Power-On Reset - Intel Agilex User Manual

For Intel Agilex devices, there is no power-down sequence requirement. Intel
recommends that you reverse the power-up sequence when you power down your
device.
Related Information
• Intel Agilex Device Family Pin Connection Guidelines
Provides more information about the power supply sharing guidelines.
• Intel Agilex Device Data Sheet
Provides more information about the t

3.3. Power-On Reset

The power-on reset (POR) circuitry keeps the Intel Agilex device in the reset state
until the power supply outputs are within the recommended operating range.
A POR event occurs when you power up the Intel Agilex device until all power supplies
monitored by the POR circuitry reach the recommended operating range within the
maximum power supply ramp time, t
I/O pins and programming registers remain tri-stated, which may cause device
configuration to fail.
Figure 3. Relationship Between t
POR trip level
The Intel Agilex POR circuitry uses individual detection circuitry to monitor each of the
configuration-related power supplies independently. The POR circuitry is gated by the
outputs of all the individual detectors.
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Intel Agilex Power Management User Guide
10
RAMP
and POR Delay
RAMP
Volts
first power
supply
3. Intel Agilex Power and I/O State Sequencing
and POR specifications.
RAMP
. If t is not met, the Intel Agilex device
RAMP
last power
supply
POR delay
t
RAMP
UG-20215 | 2019.04.02
Time
configuration
time
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