ZiLOG Z8 User Manual page 76

Z8 Microcontrollers
I/O Ports
5.12 Z8 CMOS AUTO LATCHES
I/O port bits that are configurable as inputs are protected against
open circuit conditions using Auto Latches. An Auto Latch is a
circuit which, in the event of an open circuit condition, latches
the input at a valid CMOS level. This inhibits the tendency of the
input transistors to self-bias in the forward active region, thus
PIN
The operation of the Auto Latch circuit is straight-forward. As-
sume the input pad is latched at +5V (logic 1). The inverter G1
inverts the bit, turning the P-channel FET ON and the N-channel
FET OFF. The output of the circuit is effectively shorted to V
returning +5V to the input. If the pad is then disconnected from
the +5V source, the Auto Latch will hold the input at the previ-
ous state. If the device is powered up with the input floating, the
state of the Auto Latch will be at either supply, but which state
is unpredictable.
There are four operating conditions which will activate the Auto
Latches. The first, which occurs when the input pin is physically
disconnected from any source, is the most obvious. The second
occurs when the input is connected to the output of a device with
tri-state capability.
The Auto Latch will also activate when the input voltage at the
pin is not within 200 microvolts or so of either supply rail. In this
5-30
V
DD
P
N
V
DD
Auto Latch
P
N
Figure 5-38. Simplified CMOS Z8 I/O Circuit
,
DD
drawing excessive supply current. A simplified schematic of the
CMOS Z8 I/O circuit is shown in Figure 5-38.
G1
case, the circuit will draw current, which is not significant com-
pared to the Icc operating current of the device, but will increase
I STOP Mode current of the device dramatically.
CC2
The fourth condition occurs when the I/O bit is configured as an
output. Referring to the output section of Figure 5-38, there are
two ways of tri-stating the port pin. The first is by configuring
the port as an input, which disables the OE signal turning both
transistors off. The second can be achieved in output mode by
writing a "1" to the output port, then activating the open drain
mode. Both transistors are again off, and the port bit is in a high
impedance state. The Auto Latches then pull the input section to-
ward V .
DD
ZiLOG
Open-Drain
OE
Data Out
Data In
UM001601-0803