ZiLOG Z8 User Manual page 146

Z8 Microcontrollers
Instruction Set
12.4 NOTATION AND BINARY ENCODING
In the detailed instruction descriptions that make up the rest of
this chapter, operands and status flags are represented by a nota-
Notation Address Mode
cc Condition Code
r Working Register
R Register
or
Working Register
RR Register Pair
or
Working Register Pair
Ir Indirect Working Register
IR Indirect Register
or
Indirect Working Register
Irr Indirect Working Register Pair
IRR Indirect Register Pair
or
Working Register Pair
X Indexed
DA Direct Address
RA Relative Address
IM Immediate
*See the device product specification to determine the exact register file range available. The register file size varies by the device type.
12-6
tional shorthand. Operands, condition codes, address modes, and
their notations are as follows (Table 12-12):
Table 12-12. Notational Shorthand
Operand Range *
See condition codes
Rn n = 0 – 15
Reg Reg. represents a number in the range of 00H to FFH
Rn n = 0 – 15
Reg Reg. represents an even number in the range of 00H to FEH
RRp p = 0, 2, 4, 6, 8, 10, 12, or 14
@Rn n = 0 –15
@Reg Reg. represents a number in the range of 00H to FFH
@Rn n = 0– 15
@RRp p = 0, 2, 4, 6, 8, 10, 12, or 14
@Reg Reg. represents an even number in the range 00H to FFH
@RRp p = 0, 2, 4, 6, 8, 10, 12, or 14
Reg (Rn) Reg. represents a number in the range of 00H to FFH and n = 0 – 15
Addrs Addrs. represents a number in the range of 00H to FFH
Addrs Addrs. represents a number in the range of +127 to –128 which is an
offset relative to the address of the next instruction
#Data Data is a number between 00H to FFH
ZiLOG
UM001601-0803