ZiLOG Z8 User Manual page 27

ZiLOG
The upper nibble of the register pointer selects which group of
16 bytes in the Register File, out of the full 256, will be accessed
as working registers.
For example:
(See Figure 2-4)
R253 RP = 00H ;ERF Bank 0, Working Reg. Group 0.
R0 = Port 0 = 00H
R1 = Port 1 = 01H
R2 = Port 2 = 02H
R3 = Port 3 = 03H
R11 = GPR 0BH
R15 = GPR 0FH
If:
R253 RP = 0FH ;ERF Bank F, Working Reg. Group 0.
R0 = PCON = 00H
R1 = Reserved = 01H
R2 = Reserved = 02H
R11 = SMR = 0BH
R15 = WDTMR = 0FH
If:
R253 RP = FFH ;ERF Bank F, Working Reg. Group F.
00H = PCON
R0 = SI0
R1 = TMR
R2 = T1
R15 = SPL
Since enabling an ERF Bank (C or F) only changes register ad-
dresses 00H to 0FH, the working register pointer can be used to
access either the selected ERF Bank (Bank C or F, Working
Register Group 0) or the Z8 Standard Register File (ERF Bank
0, Working Register Groups 1 through F).
Note: When an ERF Bank other than Bank 0 is enabled, the first
16 bytes of the Z8 Standard Register File (I/O ports 0 to 3,
Groups 4 to F) are no longer accessible (the selected ERF Bank,
Registers 00H to 0FH are accessed instead). It is important to re-
initialize the Register Pointer to enable ERF Bank 0 when these
registers are required for use.
The SPI register is mapped into ERF Bank C. Access is easily
done using the following example:
LD RP, #0CH ;Select ERF Bank C working
;register group 0 for access.
LD R2,#xx ;access SCON
LD R1, #xx ;access RXBUF
LD RP, #00H ;Select ERF Bank 0 so I/O ports
;are again accessible.
UM001601-0803
01H= Reserved
02H= Reserved
...
0BH = SMR
...
0FH = WDTMR
Table 2-4. Z8 Expanded Register File Bank Layout
Expanded
Register File
Bank
F(H)
E(H)
D(H)
C(H)
B(H)
A(H)
9(H)
8(H)
7(H)
6(H)
5(H)
4(H)
3(H)
2(H)
1(H)
0(H)
and General-Purpose Registers
04H to EFH, and control registers
Please refer to the specific product specification to determine the
above registers are implemented.
Z8 Microcontrollers
Address Space
ERF
PCON, SMR, WDT,
(00H, 0BH, 0FH),
Working Register Group 0
only implemented.
Not Implemented
(Reserved)
Not Implemented
(Reserved)
SPI Registers: SCOMP,
RXBUF,
SCON (00H, 01H, 02H),
Working Register Group 0
only implemented.
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Not Implemented
(Reserved)
Z8 Ports 0, 1, 2, 3,
F0H to FFH.
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