Arm / Thumb Instruction Set - Segger J-Link User Manual

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The ARM core has a total of 37 registers:
• 31 general-purpose registers, including a program counter. These registers are
32 bits wide.
• 6 status registers. These are also 32 bits wide, but only 12 bits are allocated or
need to be implemented.
Registers are arranged in partially overlapping banks, with a different register bank
for each processor mode. At any time, 15 general-purpose registers (R0 to R14), one
or two status registers, and the program counter are visible.
9.2.3

ARM / Thumb instruction set

An ARM core starts execution in ARM mode after reset or any type of exception. Most
(but not all) ARM cores come with a secondary instruction set, called the Thumb
instruction set. The core is said to be in Thumb mode if it is using the thumb instruc-
tion set. The Thumb instruction set consists of 16-bit instructions, whereas the ARM
instruction set consists of 32-bit instructions. Thumb mode improves code density by
approximately 35%, but reduces execution speed on systems with high memory
bandwidth (because more instructions are required). On systems with low memory
bandwidth, Thumb mode can actually be as fast or faster than ARM mode. Mixing
ARM and Thumb code (interworking) is possible.
J-Link / J-Trace fully supports debugging of both modes without limitation.
J-Link / J-Trace (UM08001)
CHAPTER 9
© 2004-2009 SEGGER Microcontroller GmbH & Co. KG
Background information