Analog Devices; Aduc7Xxx - Segger J-Link User Manual

Jtag emulators for arm cores
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7.1

Analog Devices

J-Link has been tested with the following MCUs from Analog Devices, but should work
with any ARM7/9 and Cortex-M3 device:
ADuC7020x62
ADuC7020x62
ADuC7021x32
ADuC7021x32
ADuC7021x62
ADuC7021x62
ADuC7022x32
ADuC7022x32
ADuC7022x62
ADuC7022x62
ADuC7024x62
ADuC7024x62
ADuC7025x32
ADuC7025x32
ADuC7025x62
ADuC7025x62
ADuC7026x62
ADuC7026x62
ADuC7027x62
ADuC7027x62
ADuC7030
ADuC7031
ADuC7032
ADuC7033
ADuC7060
ADuC7128
ADuC7129
ADuC7229x126
If you experience problems with a particular device, do not hesitate to contact Seg-
ger.
7.1.1

ADuC7xxx

All devices of this family are supported by J-Link.
7.1.1.1 Software reset
A special reset strategy has been made available for Analog Devices ADuC7xxx
MCUs. This special reset strategy is a software reset. "Software reset" means basi-
cally no reset, just changing the CPU registers such as PC and CPSR.
The software reset for Analog Devices ADuC7xxxx executes the following sequence:
The CPU is halted
A software reset sequence is downloaded to RAM
A breakpoint at address 0 is set
The software reset sequence is executed.
It is recommended to use this reset strategy. This sequence performs a reset of CPU
and peripherals and halts the CPU before executing instructions of the user program.
It is the recommended reset sequence for Analog Devices ADuC7xxx MCUs and works
with these devices only.
This information is applicable to the following devices:
Analog ADuC7020x62
Analog ADuC7021x32
Analog ADuC7021x62
Analog ADuC7022x32
J-Link / J-Trace (UM08001)
CHAPTER 7
© 2004-2009 SEGGER Microcontroller GmbH & Co. KG
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