19-Pin Jtag/Swd And Trace Connector - Segger J-Link User Manual

Jtag emulators for arm cores
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158
8.3

19-pin JTAG/SWD and Trace connector

J-Trace provides a JTAG/SWD+Trace connector. This
connector is a 19-pin connector. It connects to the
target via an 1-1 cable.
The following table lists the J-Link / J-Trace SWD pinout.
PIN
SIGNAL
1
VTref
SWDIO/
2
TMS
4
SWCLK/TCK Output
6
SWO/TDO
--- ---
8
TDI
9
NC
10
nRESET
11
5V-Supply
12
TRACECLK
13
5V-Supply
TRACE-
14
DATA[0]
TRACE-
16
DATA[1]
TRACE-
18
DATA[2]
TRACE-
20
DATA[3]
Table 8.8: 19-pin JTAG/SWD and Trace pinout
J-Link / J-Trace (UM08001)
CHAPTER 8
TYPE
This is the target reference voltage. It is used to check if
the target has power, to create the logic-level reference
Input
for the input comparators and to control the output logic
levels to the target. It is normally fed from Vdd of the
target board and must not have a series resistor.
JTAG mode set input of target CPU. This pin should be
I/O /
pulled up on the target. Typically connected to TMS of the
output
target CPU.
JTAG clock signal to target CPU. It is recommended that
this pin is pulled to a defined state of the target board.
Typically connected to TCK of the target CPU.
JTAG data output from target CPU. Typically connected to
Input
TDO of the target CPU.
This pin (normally pin 7) is not existent on the 19-pin
---
JTAG/SWD and Trace connector.
JTAG data input of target CPU.- It is recommended that
Output
this pin is pulled to a defined state on the target board.
Typically connected to TDI of the target CPU.
Not connected inside J-Link. Leave open on target hard-
NC
ware.
Target CPU reset signal. Typically connected to the RESET
I/O
pin of the target CPU, which is typically called "nRST",
"nRESET" or "RESET".
This pin can be used to supply power to the target hard-
ware. For more information about how to enable/disable
Output
the power supply, please refer to Target power supply on
page 159.
Input
Input trace clock. Trace clock = 1/2 CPU clock.
This pin can be used to supply power to the target hard-
ware. For more information about how to enable/disable
Output
the power supply, please refer to Target power supply on
page 159.
Input
Input Trace data pin 0.
Input
Input Trace data pin 0.
Input
Input Trace data pin 0.
Input
Input Trace data pin 0.
Target interfaces and adapters
VTref
GND
GND
- - -
NC
5V-Supply
5V-Supply
GND
GND
GND
Description
© 2004-2009 SEGGER Microcontroller GmbH & Co. KG
1
2
SWDIO/TMS
3
4
SWCLK/TCK
5
6
SWO/TDO
7
8
TDI
9
10
nRESET
11
12
TRACECLK
13
14
TRACEDATA[0]
15
16
TRACEDATA[1]
17
18
TRACEDATA[2]
19
20
TRACEDATA[3]

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