Tandy 1000 HX Technical Reference Manual page 200

NEC
NEC Electronics Inc.
M
PD765A/
M
PD7265
SINGLE/DOUBLE DENSITY
FLOPPY DISK CONTROLLER
Revision 2
November 1985
Description
The MPD765A is an LSI floppy disk controller (FDC) chip
which contains the circuitry and control functions for
interfacing a processor to 4 floppy disk drives. It is capa-
ble of either IBM 3740 single density format (FM), or IBM
System 34 double density format (MFM) including
double-sided recording. The /iPD765A provides control
signals which simplify the design of an external phase-
locked loop and write precompensation circuitry. The
FDC simplifies and handles most of the burdens asso-
ciated with implementing a floppy disk interface.
The /4PD7265 is an addition to the FDC family that has
been designed specifically for the Sony Micro Floppy-
disk® drive. The
M
PD7265 is pin-compatible and electri-
cally equivalent to the 765A but utilizes the Sony
recording format. The /iPD7265 can read a diskette that
has been formatted by the /iPD765A.
Each of these devices is also available in a -2 version.
The -2 versions represent a reduction from 4-micron to
3-micron design rule. Functionality is the same. Minor
differences between the two versions are detailed in the
AC Characteristics table. The -2 versions are only avail-
able in the plastic package at this time.
Hand-shaking signals are provided in the /iPD765A/
/iPD7265 which make DMA operation easy to incorpo-
rate with the aid of an external DMA controller chip,
such as the /iPD8257. The FDC will operate in either the
DMA or non-DMA mode. In the non-DMA mode the FDC
generates interrupts to the processor every time a data
byte is to be transferred. In the DMA mode, the proces-
sor need only load the command into the FDC and all
data transfers occur under control of the FDC and DMA
controllers.
There are 15 commands which the jiPD765A//iPD7265
will execute. Each of these commands requires multiple
8-bit bytes to fully specify the operation which the proc-
essor wishes the FDC to perform. The following com-
mands are available:
Read Data
Read ID
Specify
Read Track
Scan Equal
Scan High or Equal
Scan Low or Equal
Read Deleted Data
Write Data
Format Track
Write Del* ed Data
Seek
Recalibrate
Sense Interrupt Status
Sense Drive Status.
Postures
Address mark detection circuitry is internal to the FDC
which simplifies the phase-locked loop and read elec-
tronics. The track stepping rate, head load time, and
head unload time are user-programmable. The
MPD765A//iPD7265 offers additional features such as
multi-track and multi-side read and write commands
and single and double density capabilities.
• Sony (EMCA)-compatible recording format
0iPD7265)
• IBM-compatible format (single and double
density) 0iPD765A)
• Multi-sector and multi-track transfer capability
D Drive Up to 4 floppy or micro floppydisk drives
D Data scan capability—will scan a single sector or
an entire cylinder comparing byte-for-byte host
memory and disk data
D Data transfers in DMA or non-DMA mode
D Parallel seek operations on up to four drives
D Compatible with /iPD8080/85, /iPD8086/88 and
/iPD780 (Z80®) microprocessors
• Single-phase clock (8 MHz)
• +5 V only
• Z80 is a registered trademark of the Zilog Corporation.
Pin Configuration