Tandy 1000 HX Technical Reference Manual page 192

Instruction Set (cont)
Mnemonic
Control
ENI
DISI
ENTO CLK
SEL MBO
SEL MB1
SELRBO
SEL RB1
HALT
Data Moves
MOV A, # data
MOV A, Rr
MOVA, @Rr
MOV A, PSW
MOV Rr, # data
MOV Rr, A
MOV @ Rr, A
MOV @ R r , # data
Function
(DBF) — 0
(DBF) * - 1
(BS)-O
(BS) — 1
(A) — data
(A) *- (Rr); r =
(A) — ((Rr)); r
(A) —(PSW)
(Rr) — data; r
(Rr) ~ - (A); r =
((Rr)) — (A); r
((Rr)) — data;
= 0-7
= 0-1
= 0-7
= 0-7
= 0-1
r = 0-1
Description
Enables external interrupts. When external interrupts are enabled,
a low-level input to the INT pin causes the processor to vector to
the interrupt service routine.
Disables external interrupts. When external interrupts are
disabled, low-level inputs to the INT pin have no effect on program
execution.
Enables clock output to pin TO.
Clears the memory bank flip-flop, selecting program memory bank
0 (program memory addresses 0-2047(io) )• Clears PC-n after the
next JMP or CALL instruction.
Sets the memory bank flip-flop, selecting program memory bank 1
(program memory addresses 2048-4095(
10
)). Sets PC^ after the
next JMP or CALL instruction.
Selects data memory bank 0 by clearing bit 4 (bank switch) of the
PSW. Specifies data memory addresses 0-7
(10
) as registers 0-7 of
data memory bank 0.
Selects data memory bank 1 by setting bit 4 (bank switch) of the
PSW. Specifies data memory 24-31
(10
) as registers 0-7 of data
memory bank 1.
Initiates halt mode.
Moves immediate data d
o
- d
7
into the accumulator.
Moves the contents of register Rr into the accumulator.
Moves the contents of internal data memory specified by bits 0-5
in register Rr, into the accumulator.
Moves the contents of the program status word into the
accumulator.
Moves immediate data iQ-dj into register Rr.
Moves the contents of the accumulator into register Rr.
Moves the contents of the accumulator into the data memory
location specified by bits 0-5 in register Rr.
Moves immediate data 6Q-6J into the data memory location
specified by bits 0-5 in register Rr.
Hex
Code
05
15
75
E5
F5
C5
D5
01
23
Fn(4)
Fn(4)
C7
Bn(4)
An(4)
An(4)
Bn(4)
D
7
0
0
0
1
1
1
1
0
0
d?
1
1
1
1
d
7
1
1
1
D
8
0
0
1
1
1
1
1
0
0
d
6
1
1
1
0
d
6
0
0
0
d
6
Operation Code
0
0
1
1
1
0
0
0
1
d
5
1
1
0
1
d
5
1
1
1
d
5
»4
0
1
1
0
1
0
1
0
0
d
4
1
1
0
1
d
4
0
0
1
d
4
D
3
0
0
0
0
0
0
0
0
0
d
3
1
0
0
1
d
3
1
0
0
d
3
D
2
1
1
1
1
1
1
1
0
0
d
2
r
0
1
r
d
2
r
0
0
d
2
Di
0
0
0
0
0
0
0
0
1
r
0
1
r
r
0
0
Do
1
1
1
1
1
1
1
1
1
do
r
r
1
r
do
r
r
r
do
Cycles
1
1
1
1
1
1
1
1
2
1
1
1
2
1
1
2
Bytes
1
1
1
1
1
1
1
1
2
1
1
1
2
1
1
2