Tandy 1000 HX Technical Reference Manual page 194

Instruction Set (cont)
Mnemonic
Input/Output
ANLBUS,
#data
ANL Pp,
#data
ANLD Pp, A
IN A, Pp
INS A, BUS
MOVDA.Pp
MOVD Pp, A
ORLBUS,
#data
ORLD Pp, A
ORLPp,
#data
OUTL BUS, A
OUTL Pp.A
Registers
DECRr
INCRr
INC @ Rr
Function
(bus) — (bus) AND data
(Pp) — (Pp) AND data;
p = 1-2
(Pp) — (Pp) AND (A0-A3);
p = 4-7
(A) — (Pp); p = 1-2
(A) — (bus)
(A
0
-A
3
) — (Pp);p = 4-7
(A
4
-A
7
) — 0
(Pp) — (A0-A3); p = 4-7
(bus) — (bus) OR data
(Pp) —(Pp)OR(A
0
-A
3
);
p = 4-7
(Pp) — (Pp) OR data;
p = 1-2
(bus) — (A)
(Pp) — (A); p = 1-2
(Rr) — (Rr) - 1; r = 0-7
(Rr) — ( R r ) + 1 ; r = 0-7
((Rr)) — ((Rr))+1;
r = 0-1
Description
Takes the logical AND of the contents of the bus and immediate
data do-d
7
, and sends the result to the bus.
Takes the logical AND of the contents of designated port Pp and
immediate data drj-d7, and sends the result to port Pp for output.
Takes the logical AND of the contents of designated port Pp and the
lower 4 bits of the accumulator, and sends the result to port Pp for
output.
Loads the accumulator with the contents of designated port Pp.
Loads the contents of the bus into the accumulator on the rising
edge of RD.
Moves the contents of designated port Pp to the lower 4 bits of the
accumulator, and clears the upper 4 bits.
Moves the lower 4 bits of the accumulator to designated port Pp.
The upper 4 bits of the accumulator are not changed.
Takes the logical OR of the contents of the bus and immediate data
d
o
- d
7
, and sends the result to the bus.
Takes the logical OR of the contents of designated port Pp and the
lower 4 bits of the accumulator, and sends the result to port Pp for
output.
Takes the logical OR of the contents of designated port Pp and
immediate data d
o
- d
7
, and sends the result to port Pp for output.
Latches the contents of the accumulator onto the bus on the rising
edge of WR.
Note: Never use the OUTL BUS instruction when using external
program memory, as this will permanently latch the bus.
Latches the contents of the accumulator into designated port Pp for
output.
Decrements the contents of register Rr by 1.
Increments the contents of register Rr by 1.
Increments by 1 the contents of the data memory location specified
by bits 0-5 in register Rr.
Hex
Code
98
9n(5)
9n(5)
0n(5)
08
0n(5)
3n(5)
88
8n(5)
9n(5)
02
3n(5)
Cn(4)
1n(4)
1n(4)
D7
1
d
7
1
d
7
1
0
0
0
0
1
d
7
1
1
d
7
0
0
1
0
0
D
6
0
0
d
6
0
0
0
0
0
0
d
6
0
0
0
0
1
0
0
Operation Cod<
D
5
0
0
0
0
0
0
1
0
d
5
0
0
d
5
0
1
0
0
0
04
1
d
4
1
d
4
1
0
0
0
1
0
d
4
0
0
d
4
0
1
0
1
1
»3
1
d
3
1
d
3
1
1
1
1
1
1
d
3
1
1
d
3
0
1
1
1
0
»
D
2
0
d
2
0
d
2
1
0
0
1
1
0
d
2
1
0
d
2
0
0
r
r
0
Di
0
P
P
P
0
P
P
0
p
p
1
p
r
r
0
D
0
0
do
P
do
P
P
0
p
p
0
do
P
P
do
0
P
r
r
r
Cycles
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
Bytes
2
2
1
1
1
1
1
2
1
2
1
1
1
1
1