Ametek UPLC-II System Manual page 48

UPlC-ii™ System manual
Breaker 1 Channel
Start Fault Detectors (S 1 )
G
Breaker 2 Trip Fault Detector (P 2 )
Figure 3–1a. – Basic Elements for directional-comparison blocking systems
Channel
Signal
Receiver
Stop Channel Signal if
Initiated Locally
P
S From
Remote Terminal
Via Channel
S Initiate Channel Signal
X – Nominally Between 6–16 Ms
Page 3–2
Protected Line
1
Power Line Carrier
Channel
P
CS
CS
RR RR
Trip
Coil
52a
Figure 3–1b. – Contact Logic (per Terminal)
Timer
X
Trip
AND
O
Figure 3–1c. – Solid State Logic (per Terminal)
Breaker 1 Trip
Fault Detector (P 1 )
H
F I
2
Breaker 2 Channel
Start Fault Detectors (S 2 )
S
Stop Channel
Signal if
Initiated
Locally
Initiate
Channel
Signal
Pick-up
Approximately
13–16 Ms
Note: (P) Operation or (S) Signal
Provides an Input 1 on Circuit.
F E