5 SETTINGS
tion is declared in the corresponding phase and the
user can add counters and other logic to facilitate the decision making process as to the appropriate actions upon detecting
a single restrike or a series of consecutive restrikes.
A restrike event (FlexLogic operand) is declared if all of the following hold:
•
The current is initially interrupted
•
The breaker status is open
•
An elevated high frequency current condition occurs (if the
wise the condition is bypassed), and
•
The current subsequently drops out again
The algorithm is illustrated in the state machine diagram shown below.
Figure 5–109: ALGORITHM ILLUSTRATION – STATE MACHINE TO DETECT RESTRIKE
In this way, a distinction is made between a self-extinguishing restrike and permanent breaker failure condition. The latter
can be detected by the breaker failure function or a regular instantaneous overcurrent element. Also, a fast succession of
restrikes will be picked up by breaker failure or instantaneous overcurrent protection.
The following settings are available for each element.
•
BREAKER RESTRIKE 1 FUNCTION: This setting enable and disables operation of the breaker restrike detection ele-
ment.
•
BRK RSTR 1 BLOCK: This setting is used to block operation of the breaker restrike detection element.
•
BREAKER RESTRIKE 1 SOURCE: This setting selects the source of the current for this element. This source must
have a valid CT bank assigned.
•
BREAKER RESTRIKE 1 PICKUP: This setting specifies the pickup level of the overcurrent detector in per-unit values
of CT nominal current.
•
BREAKER RESTRIKE 1 RESET DELAY: This setting specifies the reset delay for this element. When set to "0 ms",
then FlexLogic operand will be picked up for only 1/8th of the power cycle.
GE Multilin
BRK RESTRIKE 1 OP
C70 Capacitor Bank Protection and Control System
5.7 CONTROL ELEMENTS
operand is asserted for a short period of time. The
BREAKER RESTRIKE 1 HF DETECT
setting is Enabled, other-
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