ZiLOG Z80380 User Manual page 82

Z
ILOG
DJNZ
DECREMENT AND JUMP IF NON-ZERO
DJNZ dst
Operation: B
If (B <> 0) then begin
dst
if (XM) then begin
PC(31-0)
end
else begin
PC(15-0)
end
end
The B register is decremented by one. If the result is non-zero, then the destination address
is calculated and then loaded into the Program Counter (PC). Control then passes to the
instruction whose address is pointed to by the PC. When the B register reaches zero, control
falls through to the instruction following DJNZ. This instruction provides a simple method of
loop control.
The destination address is calculated using Relative addressing. The displacement in the
instruction is added to the PC; the PC value used is the address of the instruction following
the DJNZ instruction.
These instructions employ either an 8-bit, 16-bit, or 24-bit signed, two's complement
displacement from the PC to permit jumps within a range of -126 to +129 bytes, -32,765 to
+32,770 bytes, or -8,388,604 to +8,388,611 bytes from the location of this instruction.
Flags: S: Unaffected
Z: Unaffected
H: Unaffected
V: Unaffected
N: Unaffected
C: Unaffected
Addressing
Mode Syntax
RA: DJNZ addr
DJNZ addr
DJNZ addr
Note: 3 if branch not taken, 4 if branch taken
5-48
dst = RA
←
B-1
←
SIGN EXTEND dst
←
PC(31-0) + dst(31-0)
←
PC(15-0) + dst(15-0)
Instruction Format
00010000 —disp—
11011101 00010000 -d(low)- -d(high)
11111101 00010000 -d(low)- -d(mid)- -d(high)
Z380
U ' M
SER S ANUAL
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Time Note
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DC-8297-03
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