ZiLOG Z80380 User Manual page 173

Z
ILOG
RESC mode
Operation: if (mode = LCK) then begin
SR(1)
end
else begin
SR(6)
end
When reseting Lock mode (LCK), the LCK bit (bit 1) in the Select Register (SR) is set to 0,
enabling external bus requests. Note that these requests cannot be granted until after the
instruction has been executed, and that one or more of the succeeding instructions may also
have been fetched for decoding before this instruction has been executed.
When reseting Long Word mode (LW), the LW bit (bit 6) in the SR is set to 0, selecting 16-
bit words. When using 16-bit words, all word load operations transfer 16 bits.
Flags: S: Unaffected
Z: Unaffected
H: Unaffected
V: Unaffected
N: Unaffected
C: Unaffected
Addressing
Mode Syntax
RESC mode
Field Encodings: mm: 01 for LW, 10 for LCK
DC-8297-03
mode = LCK, LW
← 0
← 0
Instruction Format
11mm1101 11111111
RESET CONTROL BIT
Execute
Time Note
4
™
Z380
U ' M
SER S ANUAL
RESC
5-139