ZiLOG Z80380 User Manual page 80

Z
ILOG
DI
DISABLE INTERRUPTS
DI [n]
Operation: if (n is present) then begin
for i=1 to 4 begin
if (n(i) = 1) then begin
end
if (n(0) = 1) then begin
SR(5)
end
end
else begin
SR(5)
end
If an argument is present, disable the selected interrupts by clearing the appropriate enable
bits in the Interrupt Enable Register, and then clear the Interrupt Enable Flag (IEF1) in the
Select Register (SR) if the least-significant bit of the argument is set, disabling maskable
interrupts. Bits 7-5 of the argument are ignored.
If no argument is present, IEF1 in the SR is set to 0, disabling maskable interrupts.
Note that during execution of this instruction the maskable interrupts are not sampled.
S: Unaffected
Flags:
Z: Unaffected
H: Unaffected
V: Unaffected
N: Unaffected
C: Unaffected
Addressing
Mode Syntax
DI
DI n
5-46
←
IER(i-1) 0
end
←
0
←
0
Instruction Format
11110011
11011101 11110011 —n——
Execute
Time Note
2
2
Z380 ™
U ' M
SER S ANUAL
DC-8297-03