ZiLOG Z80380 User Manual page 29

Z
ILOG
4.2.5 Indexed (X)
When the Indexed addressing mode is used, the data
processed is at the location whose address is the contents
of IX or IY in use, offset by an 8-bit signed displacement in
the instruction.
The Indexed address is computed by adding the 8-bit
two's complement signed displacement specified in the
instruction to the contents of the IX or IY register in use, also
specified by the instruction. Indexed addressing allows
random access to tables or other complex data structures
where the address of the base of the table is known, but the
particular element index must be computed by the pro-
gram.
Instruction
OPERATION REGISTER →
DISPLACEMENT
Example of X mode:
1. Load accumulator from location (IX-1) in Native mode
LD A, (IX-1)
Before instruction execution
After instruction execution
Memory location
Address calculation: In Native mode, 0FFH encoding in
the instruction is sign extended to a 16-bit value before the
address calculation, but calculation is done in modulo 2
and does not take into account the index register's
extended portion.
4-4
→+
ADDRESS
_____________________________________
;Load into the accumulator the
;contents of the memory location
;whose address is one less than
;the contents of IX
;Assume it is in Native mode
A IXz
01 0001
23 0001
0001FFFF 23
16
The offset portion can be expanded to 16 or 24 bits,
instead of eight bits by using DDIR Immediate Data Direc-
tives (DDIR IB for 16-bit offset, DDIR IW for 24-bit offset).
Note that computation of the effective address is affected
by the operation mode (Native or Extended). In Native
mode, address computation is done in modulo 2
Extended mode, address computation is done in modulo
2 32 .
REGISTER MEMORY
OPERAND
↑
IX
0000
0000
0000
+ FFFF
FFFF
Z380 ™
U ' M
SER S ANUAL
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