ZiLOG Z80380 User Manual page 101

Z
ILOG
IN0 dst,(n)
dst ← (n)
Operation:
The byte of data from the selected on-chip peripheral is loaded into the destination register.
No external I/O transaction will be generated as a result of this instruction, although the
I/O address will appear on the address bus while this internal read is occurring. The
peripheral address is placed on the low byte of the address bus and zeros are placed on
all other address lines. When the second opcode byte is 30h no data is stored in a
destination; only the flags are updated.
Flags: S: Set if the input data is negative; cleared otherwise
Z: Set if the input data is zero; cleared otherwise
H: Cleared
P: Set if the input data has even parity; cleared otherwise
N: Cleared
C: Unaffected
Addressing
Mode Syntax
IN0 R,(n)
R:
none: IN0 (n
Field Encodings: r: per convention
DC-8297-03
dst = R
Instruction Format
11101101 00 -r- 000 ——n—
11101101 00110000 ——n—
INPUT (FROM PAGE 0)
Execute
Time Note
3+i
3+i
™
Z380
U ' M
SER S ANUAL
IN0
5-67