ZiLOG Z80380 User Manual page 129

Z
ILOG
LDCTL dst,src
Operation: if (LW) then begin
dst(31-16) ←
end
else begin
dst(31-24) ←
dst(23-16) ←
end
dst(15-8)
dst(0)
The contents of the HL register are loaded into the Select Register (SR). If Long Word mode
is not in effect the upper byte of the HL register is copied into the three most significant bytes
of the select register. This instruction does not modify the mode bits in the SR. There are
dedicated instructions to modify the mode bits.
Flags: S: Unaffected
Z: Unaffected
H: Unaffected
V: Unaffected
N: Unaffected
C: Unaffected
Load from Control Register
Addressing
Mode Syntax
R: LDCTL SR,HL
DC-8297-03
LOAD INTO CONTROL REGISTER (WORD)
dst = SR
src = HL
HL(31-16)
HL(15-8)
HL(15-8)
←
HL(15-8)
←
HL(0)
Instruction Format
11101101 11001000
Execute
Time Note
4 L
™
Z380
U ' M
SER S ANUAL
LDCTL
5-95