ZiLOG Z80380 User Manual page 121

Z
ILOG
LD[W] dst,src dst = R
Operation: if (LW) then begin
dst(31-0)
end
else begin
dst(15-0)
end
The contents of the source are loaded into the destination.
S: Unaffected
Flags:
Z: Unaffected
H: Unaffected
V: Unaffected
N: Unaffected
C: Unaffected
Load into Register
Addressing
Mode Syntax
LD Rd,Rs
R:
RX: LD R,RX
IR: LD R,(IR)
LD RX,(IR)
DA: LD HL,(nn)
LD R,(nn)
LD RX,(nn)
X: LD R,(XY+d)
LD IX,(IY+d)
LD IY,(IX+d)
SR: LD R,(SP+d)
LD RX,(SP+d)
DC-8297-03
src = R, RX, IR, DA, X, SR
or
dst = R, RX, IR, DA, X, SR
src = R
←
src(31-0)
←
src(15-0)
Instruction Format
11rs1101 00rd0010
11y11101 00rr1011
11011101 00rr11ri
11y11101 00ri0011
00101010 -n(low)- -n(high)
11101101 01ra1011 -n(low)- -n(high)
11y11101 00101010 -n(low)- -n(high)
11y11101 11001011 ——d— 00rr0011
11111101 11001011 ——d— 00100011
11011101 11001011 ——d— 00100011
11011101 11001011 ——d— 00rr0001
11y11101 11001011 ——d— 00100001
LOAD REGISTER (WORD)
Execute
Time Note
2 L
2 L
2+r L
2+r L
3+r I, L
3+r I, L
3+r I, L
4+r I, L
4+r I, L
4+r I, L
4+r I, L
4+r I, L
™
Z380
U ' M
SER S ANUAL
LD[W]
5-87