Figure 6.6. Amx0Sl: Amux0 Channel Select Register - Silicon Laboratories C8051F120 Manual

Figure 6.6. AMX0SL: AMUX0 Channel Select Register

0
SFR Page:
0xBB
SFR Address:
R/W R/W
- -
Bit7 Bit6
Bits7-4: UNUSED. Read = 0000b; Write = don't care.
Bits3-0: AMX0AD3-0: AMX0 Address Bits.
0000-1111b: ADC Inputs selected per chart below.
0000 0001
0000
AIN0.0 AIN0.1
+(AIN0.0)
0001
-(AIN0.1)
0010
AIN0.0 AIN0.1
+(AIN0.0)
0011
-(AIN0.1)
0100
AIN0.0 AIN0.1
+(AIN0.0)
0101
-(AIN0.1)
0110
AIN0.0 AIN0.1
+(AIN0.0)
0111
-(AIN0.1)
1000
AIN0.0 AIN0.1
+(AIN0.0)
1001
-(AIN0.1)
1010
AIN0.0 AIN0.1
+(AIN0.0)
1011
-(AIN0.1)
1100
AIN0.0 AIN0.1
+(AIN0.0)
1101
-(AIN0.1)
1110
AIN0.0 AIN0.1
+(AIN0.0)
1111
-(AIN0.1)
R/W R/W R/W
- - AMX0AD3 AMX0AD2 AMX0AD1 AMX0AD0 00000000
Bit5 Bit4 Bit3
AMX0AD3-0
0010 0011
AIN0.2 AIN0.3
AIN0.2 AIN0.3
+(AIN0.2)
-(AIN0.3)
+(AIN0.2)
-(AIN0.3)
AIN0.2 AIN0.3
AIN0.2 AIN0.3
+(AIN0.2)
-(AIN0.3)
+(AIN0.2)
-(AIN0.3)
AIN0.2 AIN0.3
AIN0.2 AIN0.3
+(AIN0.2)
-(AIN0.3)
+(AIN0.2)
-(AIN0.3)
AIN0.2 AIN0.3
AIN0.2 AIN0.3
+(AIN0.2)
-(AIN0.3)
+(AIN0.2)
-(AIN0.3)
Rev. 1.2
C8051F120/1/2/3/4/5/6/7
R/W R/W
Bit2 Bit1
0100 0101 0110
AIN0.4 AIN0.5 AIN0.6
AIN0.4 AIN0.5 AIN0.6
AIN0.4 AIN0.5 AIN0.6
AIN0.4 AIN0.5 AIN0.6
+(AIN0.4)
AIN0.6
-(AIN0.5)
+(AIN0.4)
AIN0.6
-(AIN0.5)
+(AIN0.4)
AIN0.6
-(AIN0.5)
+(AIN0.4)
AIN0.6
-(AIN0.5)
+(AIN0.6)
AIN0.4 AIN0.5
-(AIN0.7)
+(AIN0.6)
AIN0.4 AIN0.5
-(AIN0.7)
+(AIN0.6)
AIN0.4 AIN0.5
-(AIN0.7)
+(AIN0.6)
AIN0.4 AIN0.5
-(AIN0.7)
+(AIN0.4) +(AIN0.6)
-(AIN0.5) -(AIN0.7)
+(AIN0.4) +(AIN0.6)
-(AIN0.5) -(AIN0.7)
+(AIN0.4) +(AIN0.6)
-(AIN0.5) -(AIN0.7)
+(AIN0.4) +(AIN0.6)
-(AIN0.5) -(AIN0.7)
R/W Reset Value
Bit0
0111 1xxx
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
AIN0.7
SENSOR
TEMP
SENSOR
TEMP
SENSOR
TEMP
SENSOR
TEMP
SENSOR
TEMP
SENSOR
TEMP
SENSOR
TEMP
SENSOR
TEMP
SENSOR
73