Mode 1: 8-Bit Uart, Variable Baud Rate; Figure 22.4. Uart0 Mode 1 Timing Diagram - Silicon Laboratories C8051F120 Manual

22.1.2. Mode 1: 8-Bit UART, Variable Baud Rate

Mode 1 provides standard asynchronous, full duplex communication using a total of 10 bits per data byte: one start
bit, eight data bits (LSB first), and one stop bit. Data are transmitted from the TX0 pin and received at the RX0 pin.
On receive, the eight data bits are stored in SBUF0 and the stop bit goes into RB80 (SCON0.2).
Data transmission begins when an instruction writes a data byte to the SBUF0 register. The TI0 Transmit Interrupt
Flag (SCON0.1) is set at the end of the transmission (the beginning of the stop-bit time). Data reception can begin
any time after the REN0 Receive Enable bit (SCON0.4) is set to logic 1. After the stop bit is received, the data byte
will be loaded into the SBUF0 receive register if the following conditions are met: RI0 must be logic 0, and if SM20
is logic 1, the stop bit must be logic 1.
If these conditions are met, the eight bits of data is stored in SBUF0, the stop bit is stored in RB80 and the RI0 flag is
set. If these conditions are not met, SBUF0 and RB80 will not be loaded and the RI0 flag will not be set. An interrupt
will occur if enabled when either TI0 or RI0 are set.

Figure 22.4. UART0 Mode 1 Timing Diagram

MARK
START
BIT
SPACE
BIT TIMES
BIT SAMPLING
The baud rate generated in Mode 1 is a function of timer overflow, shown in Equation 22.1 and Equation 22.2.
UART0 can use Timer 1 operating in 8-Bit Auto-Reload Mode, or Timer 2, 3, or 4 operating in Auto-reload Mode to
generate the baud rate (note that the TX and RX clocks are selected separately). On each timer overflow event (a roll-
over from all ones - (0xFF for Timer 1, 0xFFFF for Timer 2) - to zero) a clock is sent to the baud rate logic.
Timers 2, 3, and 4 are selected as the baud rate source with bits in the SSTA0 register (see Figure 22.9). The transmit
baud rate clock is selected using the S0TCLK1 and S0TCLK0 bits, and the receive baud rate clock is selected using
the S0RCLK1 and S0RCLK0 bits.
The Mode 1 baud rate equations are shown below, where T1M is bit4 of register CKCON, TH1 is the 8-bit reload reg-
ister for Timer 1, and [RCAPnH , RCAPnL] is the 16-bit reload register for Timer 2, 3, or 4.
Equation 22.1. Mode 1 Baud Rate using Timer 1
BaudRate
Equation 22.2. Mode 1 Baud Rate using Timer 2, 3, or 4
BaudRate
D0 D1 D2 D3
SMOD0
2
  
×
------------------ -
=
  
32
= -------------------------------------------------------------------------------------------- -
× (
16 65536 –
Rev. 1.2
C8051F120/1/2/3/4/5/6/7
D4 D5 D6
( T1M 1 ) )
–
×
SYSCLK 12
------------------------------------------------------- -
( )
256 TH1 –
SYSCLK
[ RCAPnH RCAPnL , ]
STOP
D7
BIT


)
265