Silicon Laboratories C8051F120 Manual page 141

SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register Address
PCA0CPL4 0xED
PCA0CPL5 0xE1
PCA0CPM0 0xDA
PCA0CPM1 0xDB
PCA0CPM2 0xDC
PCA0CPM3 0xDD
PCA0CPM4 0xDE
PCA0CPM5 0xDF
PCA0H 0xFA
PCA0L 0xF9
PCA0MD 0xD9
PCON 0x87
PLL0CN 0x89
PLL0DIV 0x8D
PLL0FLT 0x8F
PLL0MUL 0x8E
PSBANK 0xB1
PSCTL 0x8F
PSW 0xD0
RCAP2H 0xCB
RCAP2L 0xCA
RCAP3H 0xCB
RCAP3L 0xCA
RCAP4H 0xCB
RCAP4L 0xCA
REF0CN 0xD1
RSTSRC 0xEF
SADDR0 0xA9
SADEN0 0xB9
SBUF0 0x99
SBUF1 0x99
SCON0 0x98
SCON1 0x98
SFRLAST 0x86
SFRNEXT 0x85
SFRPAGE 0x84
SFRPGCN 0x96
SMB0ADR 0xC3
SMB0CN 0xC0
SMB0CR 0xCF
SMB0DAT 0xC2
SMB0STA 0xC1
SP 0x81
SPI0CFG 0x9A
Table 12.3. Special Function Registers
SFR
Description
Page
0 PCA Module 4 Capture/Compare Low Byte
0 PCA Module 5 Capture/Compare Low Byte
0 PCA Module 0 Mode
0 PCA Module 1 Mode
0 PCA Module 2 Mode
0 PCA Module 3 Mode
0 PCA Module 4 Mode
0 PCA Module 5 Mode
0 PCA Counter High Byte
0 PCA Counter Low Byte
0 PCA Mode
All Pages Power Control
F PLL Control
F PLL Divider
F PLL Filter
F PLL Multiplier
All Pages FLASH Bank Select
0 FLASH Write/Erase Control
All Pages Program Status Word
0 Timer/Counter 2 Capture/Reload High Byte
0 Timer/Counter 2 Capture/Reload Low Byte
1 Timer 3 Capture/Reload High Byte
1 Timer 3 Capture/Reload Low Byte
2 Timer/Counter 4 Capture/Reload High Byte
2 Timer/Counter 4 Capture/Reload Low Byte
0 Voltage Reference Control
0 Reset Source
0 UART 0 Slave Address
0 UART 0 Slave Address Mask
0 UART 0 Data Buffer
1 UART 1 Data Buffer
0 UART 0 Control
1 UART 1 Control
All Pages SFR Stack Last Page
All Pages SFR Stack Next Page
All Pages SFR Page Select
F SFR Page Control
0 SMBus Slave Address
0 SMBus Control
0 SMBus Clock Rate
0 SMBus Data
0 SMBus Status
All Pages Stack Pointer
0 SPI Configuration
Rev. 1.2
C8051F120/1/2/3/4/5/6/7
page 108†, page 110††
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