Uart1; Figure 23.1. Uart1 Block Diagram - Silicon Laboratories C8051F120 Manual

23.

UART1

UART1 is an asynchronous, full duplex serial port offering modes 1 and 3 of the standard 8051 UART. Enhanced
baud rate support allows a wide range of clock sources to generate standard baud rates (details in
"23.1. Enhanced Baud Rate Generation" on page
of a second incoming data byte before software has finished reading the previous data byte.
UART1 has two associated SFRs: Serial Control Register 1 (SCON1) and Serial Data Buffer 1 (SBUF1). The single
SBUF1 location provides access to both transmit and receive registers. Reading SBUF1 accesses the buffered
Receive register; writing SBUF1 accesses the Transmit register.
With UART1 interrupts enabled, an interrupt is generated each time a transmit is completed (TI1 is set in SCON1), or
a data byte has been received (RI1 is set in SCON1). The UART1 interrupt flags are not cleared by hardware when
the CPU vectors to the interrupt service routine. They must be cleared manually by software, allowing software to
determine the cause of the UART1 interrupt (transmit complete or receive complete).
Write to
SBUF1
UART1 Baud
Rate Generator
276). Received data buffering allows UART1 to start reception

Figure 23.1. UART1 Block Diagram

SFR Bus
TB81
SBUF1
SET
(TX Shift)
D Q
CLR
Zero Detector
Stop Bit Shift
Data
Start
Tx Control
Tx Clock
Send
Tx IRQ
SCON1
TI1
RI1
Rx IRQ
Rx Clock
Rx Control
Load
Start
SBUF1
Shift 0x1FF RB81
Input Shift Register
(9 bits)
Load SBUF1
SBUF1
(RX Latch)
Read
SBUF1
SFR Bus
Rev. 1.2
C8051F120/1/2/3/4/5/6/7
TX1
Crossbar
Serial
Port
Interrupt
RX1
Crossbar
Section
Port I/O
275