Appendix; Specifications - Rice Lake IQ plus 310A Installation Manual

7 APPENDIX

7.1 SPECIFICATIONS

Analog Specifications
Full Scale Input Signal
Input Impedance
Noise (Referred to Input)
Internal Resolution
Display Resolution
Measurement Rate
Input Sensitivity
System Linearity
Zero Stability
Span Stability
Recommended Recalibration
Calibration Method
Common Mode Voltage
Common Mode Rejection
Normal Mode Rejection
Input Overload
Excitation Voltage
Display Filtering
Sense Amplifier
RFI Protection
Digital Specifications
Microcomputer NEC µPD75216A
Program Memory:
RAM:
EEROM:
Digital Filtering Software selectable, See Section 7.2
Digital Inputs 2 inputs, TTL or switch closure, active low, Programmable
Serial Communication
EDP Port
Printer Port
Both Ports
Operator Interface
Display 14 mm (0.55 inch), 14-segment vacuum fluorescent, 7 full digit display. Display update rate
adjustable from 250ms to 4 seconds.
Additional Symbols Tare, Preset Tare, Tare In System, Standstill, Net, Brutto, Center of Zero, Minus Sign, lb, kg,
Entry Mode
Color Blue-green
Keyboard 5-key flat membrane panel. Tactile feel provided by stainless steel domes
5 to 40 mV including deadload (initial load)
200 MΩ, typical
0.3 µV p-p with 4-4-4 filter, maximum
Approximately 1,000,000 counts
60,000 dd
50 meas/sec, typ.
50 nV per internal count
Within 0.01% of FS
150 nV/° C, maximum
3.5 ppm/°C, maximum
3 years
Software calibration, with long-term storage in EEPROM
± 4V, referred to earth
140 dB, minimum @ 50 or 60 Hz
90 dB, minimum @ 50 or 60 Hz
12V
10 ± 0.5 Vdc, 6 x 350Ω load cells
Selectable digital filtering and update rate
Differential amplifier with selectable 4 wire/6 wire sensing
Signal, excitation, and sense lines protected by capacitor bypass
16K x 8, internal to µC
512 x 4, internal to µC
128 x 8, ER5911 or ER59C11
Full Duplex: 19200, 9600, 4800, 2400, 1200 baud
Simplex: 19200, 9600, 4800, 2400, 1200 baud
Selectable: EDP (Bidirectional RS232)
PRN (RS232 or 20 mA current loop, output only)
8 data bits, no parity
7 data bits, even parity
7 data bits, odd parity
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