Architectural Overview; Introduction - IDT 89HPES64H16G2 User Manual

Notes
PES64H16G2 User Manual
®

Introduction

This section provides a high level architectural overview of the PES64H16G2. An architectural block
diagram of the PES64H16G2 is shown in Figure 2.1.
PCI Express Port s PCI Express Port s
SerDes SerDes SerDes SerDes
Port Port Por t Por t
Switch Core Switch Core
Port Port Port Port
SerDes SerDes SerDes SerDes
PCI Express Port s PCI Express Port s
The PES64H16G2 contains sixteen x4 ports labeled port 0 through port 15. An even port n and its odd
counterpart, port n+1, may be merged to create a single x8 port.
– When ports are merged, the odd numbered port is not logically visible in the PCI Express hier-
archy associated with the port.
All ports support 2.5 GT/s (i.e., Gen1) and 5.0 GT/s (i.e., Gen2) operation.
At a high level, the PES64H16G2 consists of ports and a switch core. A port consists of a logic that
performs functions associated with the physical, data link, and transactions layers described in the PCIe
base 2.0 specification. In addition, a port performs switch application layer functions such as TLP routing
using route map tables, processing configuration read and write requests, etc.
The switch core is responsible for transferring TLPs between ports. Its main functions are: input buff-
ering, maintaining per port ingress and egress flow control information, port and VC arbitration, scheduling,
and forwarding TLPs between ports.
Since the PES64H16G2 represents a single architecture optimized for both fan-out and system inter-
connect applications, its switch core is based on a non-blocking crossbar.

Architectural Overview

SerDes SerDes
.... ....
Controller Controller
Port Port
SMBus SMBus
Interface Interface
SMBus SMBus
Interface Interface
.... ....
Port Port
Controller Controller
SerDes SerDes
Figure 2.1 PES64H16G2 Block Diagram
2 - 1
GPIO GPIO
GPIO GPIO
Master Master
Master SMBus Master SMBus
Slave Slave
Slave SMBus Slave SMBus
Reset Reset
Reset and Boot Reset and Boot
Conf iguration Vector Conf iguration Vector
April 5, 2013
Chapter 2