IDT Switch Configuration and Status Registers
Bit
Field
Field
Name
25:23
TX_FSLEW_G2
26
TX_SLEW_C
28:27
TX_AMPBOOST
31:29
Reserved
PES64H16G2 User Manual
Default
Type
Value
RW
0x0
Transmit Driver Fine Slew Adjustment in Gen2. This field allows
SWSticky
fine adjustment of the output driver's slew rate at Gen 2 data-rate,
for the lane(s) selected by the Lane Select (LANESEL[3:0]) field in
the SerDes Control (S[x]CTL) register.
This value is SWSticky for all lanes (i.e., even those not selected
by the LANESEL field in the S[x]CTL register).
RW
0x0
Transmit Slew Control Disable.
SWSticky
When set, the slew control fields in this register (TX_SLEW_G1/2
and TX_FSLEW_G1/2) are disabled and the SerDes transmitter
uses its maximum slew rate setting.
RW
0x1
Transmit Driver Amplitude Boost. This field increases the trans-
SWSticky
mitter driver's differential swing for the lane(s) selected by the Lane
Select (LANESEL[3:0]) field in the SerDes Control (S[x]CTL) regis-
ter.
Valid settings are 0x0 to 0x3, where 0x0 selects no amplitude
boost and 0x3 selects the highest amount of boost. Each increas-
ing setting boosts the amplitude by ~5% over the previous setting.
Increasing this setting will also increase the power consumed by
the affected lanes. Each increasing setting increases power con-
sumption by ~2% over the previous setting.
This value is SWSticky for all lanes (i.e., even those not selected
by the LANESEL field in the S[x]CTL register).
RO
0x0
Reserved field.
17 - 11
Description
April 5, 2013
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