IDT 89HPES64H16G2 User Manual page 140

IDT Theory of Operation
Notes
PES64H16G2 User Manual
PCI
Express
Error
Specifica-
Condition
tion
Section
Unexpected com- 2.3.2
pletion received
Receiver overflow 2.6.1.2
Flow control pro- 2.6.1
tocol error
Malformed TLP See Tables 9.11
and 9.12 below
Multicast Blocked Multicast ECN
TLP
Internal Error Internal Error
Reporting ECN
Table 9.9 Transaction Layer Errors associated with the PCI-to-PCI Bridge Function (Part 2 of 2)
1.
Refer to PCI Express Base 2.0 specification.
2.
If the function is an intermediate receiver but does not receive the packet from the link, the error is not logged in AER.
3.
Internal Error Reporting Engineering Change Notice to PCI Express 2.0 Base specification, April 24, 2008, PCI-SIG.
Note that ECRC checking is enabled for the port when at least one of the functions in the port has ECRC
checking enabled. When ECRC checking is enabled for the port, the port checks the ECRC of all TLPs in
which the TLP Digest (TD) bit is set in the TLP header. ECRC error logging and signaling is only applicable
to port functions which have ECRC checking enabled.
Table 9.10 lists the conditions for which the PCI-to-PCI Bridge function in the PES64H16G2 ports
handles requests as unsupported requests (UR).
Role
Func- Based
tion- (Advisory)
Specific Error
1
Error Reporting
Condition
Yes if a func- Advisory when
tion claims the correspond-
the TLP. Else ing error is con-
No. figured as non-
fatal in the
AERUESV reg-
ister
No N/A (always
non-advisory)
No N/A (always
non-advisory)
No N/A (always
non-advisory)
Yes N/A (always
non-advisory)
Yes N/A (always
3
non-advisory)
9 - 10
Action Taken
Non-advisory cases: uncorrectable
error processing.
Advisory cases: correctable error pro-
cessing.
TLP header logged in AER.
The unexpected completion is dropped.
Uncorrectable error processing
TLP header is not logged in AER.
TLP is nullified.
Not applicable. The PES64H16G2
does not check for any flow control
errors.
Uncorrectable error processing
TLP header logged in AER.
TLP is nullified.
The Signaled Target Abort (STAS) bit is
set in the PCISTS or SECSTS register
if the TLP was received on the func-
tion's primary or secondary side
respectively.
Uncorrectable error processing
TLP header logged in AER.
TLP is nullified.
Refer to section Internal Errors on page
3-13.
April 5, 2013