IDT 89HPES64H16G2 User Manual page 304

Pci express
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IDT Switch Configuration and Status Registers
Bit
Field
Field
Name
22
BLANK
23
ROLLOVER
24
EEPROM-
DONE
25
NAERR
26
Reserved
27
OTHERERR
28
ICSERR
29
31:30
Reserved
PES64H16G2 User Manual
Default
Type
Value
RW1C
0x0
RW1C
0x0
RO
0x0
RW1C
0x0
RO
0x0
RW1C
0x0
RW1C
0x0
URIA
RW1C
0x0
RO
0x0
Description
Blank Serial EEPROM. When the switch is configured to operate
in a mode in which serial EEPROM initialization occurs during a
Switch Fundamental Reset, this bit is set when a blank serial
EEPROM is detected.
Due to a small design problem, this bit may also be set when any
of the following conditions is met.
1) The NUMDW[15:0] field in programmed incorrectly in a sequen-
tial double word initialization sequence stored in the EEPROM (see
Figure 13.3 in Chapter 13).
2) Programming the first byte of the configuration done sequence
stored in the EEPROM to a value other than 0xC0 (see Figure
13.4 in Chapter 13).
Serial EEPROM Rollover. When the switch is configured to oper-
ate in a mode in which serial EEPROM initialization occurs during
a Switch Fundamental Reset, this bit is set when a Serial
EEPROM address rollover error is detected.
Serial EEPROM Initialization Done. When the switch is config-
ured to operate in a mode in which serial EEPROM initialization
occurs during a Switch Fundamental Reset, this bit is set when
serial EEPROM initialization completes or when an error is
detected.
No Acknowledge Error. This bit is set if an unexpected NACK is
observed during a master SMBus transaction. The setting of this
bit may indicate the following: that the addressed device does not
exist on the SMBus (i.e., addressing error); data is unavailable or
the device is busy; an invalid command was detected by the slave;
or invalid data was detected by the slave.
Reserved field.
Other Error. This bit is set if a misplaced START or STOP condi-
tion is detected by the master SMBus interface.
Initialization Checksum Error. This bit is set if an invalid check-
sum is computed during Serial EEPROM initialization or when a
configuration done command is not found in the serial EEPROM.
Unmapped Register Initialization Attempt. This bit is set if an
attempt is made to initialize via serial EEPROM a register that is
not defined in the corresponding PCI configuration space.
Reserved field.
17 - 22
April 5, 2013

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