IDT 89HPES5T5 Manuals

Manuals and User Guides for IDT 89HPES5T5. We have 1 IDT 89HPES5T5 manual available for free PDF download: Preliminary User's Manual

IDT 89HPES5T5 Preliminary User's Manual

IDT 89HPES5T5 Preliminary User's Manual (164 pages)

PCI Express Switch PRECISE series

Brand: IDT | Category: Switch | Size: 1.91 MB

Table of Contents

About this Manual
3
Reference Documents
6
Table of Contents
9
PES5T5 Device Overview

21
- Introduction
  21
- List of Features
  21
- System Diagrams
  23
- Logic Diagram
  24
  - Ssid/Ssvid
    24
  - Device Serial Number Enhanced Capability
    25
- Pin Description
  25
- Table 1.3 General Purpose I/O Pins
  26
- Table 1.4 System Pins
  27
- Table 1.5 Test Pins
  28
- Table 1.6 Power and Ground Pins
  28
- Pin Characteristics
  29
- Table 1.7 Pin Characteristics
  29
- System Identification
  30
  - Vendor ID
    30
  - Device ID
    30
  - Revision ID
    30
  - Table 1.8 PES5T5 Device ID
    30
  - Table 1.9 PES5T5 Revision ID
    30
  - Jtag ID
    31
- Port Configuration
  31
Clocking, Reset, and Initialization

33
- Introduction
  33
- Table 2.1 Reference Clock Mode Encoding
  33
- Table 2.2 Boot Configuration Vector Signals
  36
- Reset
  37
  - Fundamental Reset
    37
  - Hot Reset
    39
  - Upstream Secondary Bus Reset
    40
  - Downstream Secondary Bus Reset
    40
- Downstream Port Reset Outputs
  41
Theory of Operation

43
Link Operation

45
- Introduction
  45
- Polarity Inversion
  45
- Link Width Negotiation
  45
- Link Retraining
  45
- Link down
  45
- Slot Power Limit Support
  46
  - Upstream Port
    46
  - Downstream Port
    46
- Link States
  46
- Active State Power Management
  47
- Link Status
  48
General Purpose Inputs/Outputs

49
- GPIO Configuration
  49
Smbus Interfaces

55
Power Management

73
Hot-Plug and Hot-Swap

83
- Introduction
  83
- Hot-Swap
  88
Configuration Registers

89
JTAG Boundary Scan

155
- Introduction
  155
- Test Access Point
  155
- Signal Definitions
  155
- Table 10.1 JTAG Pin Descriptions
  156
- Boundary Scan Chain
  157
- Table 10.2 Boundary Scan Chain
  157
- Test Data Register (DR)
  158
  - Boundary Scan Registers
    158
- Instruction Register (IR)
  160
  - Extest
    161
  - Sample/Preload
    161
  - Bypass
    161
  - Table 10.3 Instructions Supported by Pes5T5'S JTAG Boundary Scan
    161
  - Clamp
    162
  - Idcode
    162
  - Validate
    162
  - Reserved
    162
  - Table 10.4 System Controller Device Identification Register
    162
  - Usage Considerations
    163

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