Receiver Equalization Controls; Table 8.8 Serdes Transmit Drive Swing In Low Swing Mode At Gen2 Speed - IDT 89HPES64H16G2 User Manual

IDT SerDes
Notes
PES64H16G2 User Manual

Table 8.8 SerDes Transmit Drive Swing in Low Swing Mode at Gen2 Speed

When the PHY enters the Polling.Compliance state and low-swing mode is enabled, the following
occurs:
– The transmit drive level is selected by the Transmit Margin (TM) field in the PCIELCTL2 register.
This field has specific transmit margin levels for full-swing and low-swing mode. The values corre-
sponding to low-swing mode are applied.
– De-emphasis is turned off.

Receiver Equalization Controls

The switch contains SerDes receiver equalization controls on a per-lane basis. The receiver equaliza-
tion circuit has two controls which may be programmed via the SerDes Receiver Equalization Lane Control
(S[x]RXEQLCTL) register. These are:
– Receiver Equalization Zero (RXEQZ): Increases the high-frequency gain of the equalizer.
– Receiver Equalization Boost (RXEQB): Reduces the low-frequency gain of the equalizer.
Together, RXEQZ and RXEQB provide wide programmability and fine grain control over the equalizer's
boost. Refer to the definition of the S[x]RXEQLCTL register for further details on programming these
controls.
Drive Level TDVL_LSG2
764 0x0F
737 0x0E
709 0x0D
682 0x0C
649 0x0B
616 0x0A
583
550
506
462
418
374
320
266
212
158
8 - 14
0x09
0x08
0x07
0x06
0x05
0x04
0x03
0x02
0x01
0x00
April 5, 2013