Power Budgeting Enhanced Capability - IDT 89HPES64H16G2 User Manual

IDT PCI to PCI Bridge and Proprietary Port Specific Registers
VCR0TBL3 - VC Resource 0 Port Arbitration Table Entry 3 (0x24C)
Bit
Field
3:0
7:4
11:8
15:12
19:16
23:20
27:24
31:28

Power Budgeting Enhanced Capability

PWRBCAP - Power Budgeting Capabilities (0x280)
Bit
Field
15:0
19:16
31:20
PES64H16G2 User Manual
Field Default
Type
Name Value
PHASE24 RW 0x0
PHASE25 RW 0x0
PHASE26 RW 0x0
PHASE27 RW 0x0
PHASE28 RW 0x0
PHASE29 RW 0x0
PHASE30 RW 0x0
PHASE31 RW 0x0
Field Default
Type
Name Value
CAPID RWL 0x0
CAPVER RWL 0x0
NXTPTR RWL Refer to sec-
tion Capabil-
ity Structures
on page 15-3.
Description
Phase 24. This field contains the port ID for the corresponding port
arbitration period.
Phase 25. This field contains the port ID for the corresponding port
arbitration period.
Phase 26. This field contains the port ID for the corresponding port
arbitration period.
Phase 27. This field contains the port ID for the corresponding port
arbitration period.
Phase 28. This field contains the port ID for the corresponding port
arbitration period.
Phase 29. This field contains the port ID for the corresponding port
arbitration period.
Phase 30. This field contains the port ID for the corresponding port
arbitration period.
Phase 31. This field contains the port ID for the corresponding port
arbitration period.
Description
Capability ID. The value of 0x4 indicates a power budgeting capa-
bility structure.
If the power budgeting capability is used, then this field should be
initialized with data from a serial EEPROM.
Capability Version. The value of 0x1 indicates compatibility with
the PCI Express 2.0 specification.
If the power budgeting capability is used, then this field should be
initialized with data from a serial EEPROM.
Next Pointer. Next capability pointer. The value of 0x0 terminates
the list.
16 - 47 April 5, 2013