21555 Microarchitecture - Intel 21555 User Manual

Figure 2 shows the 21555 microarchitecture.
Figure 2. 21555 Microarchitecture
rimary
PCI
Bus
21555 Non-Transparent PCI-to-PCI Bridge User Manual
21555
21555
Downstream Delayed Buffer
Downstream Posted Write Buffer
Upstream Read Data Buffer
Downstream Read Data Buffer
Upstream Posted Write Buffer
Upstream Delayed Buffer
Primary
Target
Control
Primary
Config
Registers
Primary
Master
Control
JTAG
JTAG Signals
Device-
Secondary
CSR
Specific
Config
Registers
Config
Registers
Registers
ROM
Interface
Control
ROM Interface Interrupt
Signals
Signals
Introduction
Secondary
PCI
Bus
Secondary
Target
Control
Secondary
Master
Control
Secondary
Bus
Arbiter
Secondary Arbiter
Signals
A7418-01
19