Doorbell Interrupts; Scratchpad Registers - Intel 21555 User Manual

11.3

Doorbell Interrupts

A 16-bit software controlled interrupt request register and an associated 16-bit mask register is implemented for
each interface (primary and secondary). Each register is byte addressable for use as two sets of 8-bit interrupt
request and interrupt mask registers for each interface (four in all) if desired. These registers can be accessed from
the primary or secondary interface of the 21555, in either memory space or I/O space.
The 21555 doorbell interrupt functionality consists of the following registers:
•
Primary Interrupt Request 16-bit register.
•
Secondary Interrupt Request 16-bit register.
•
Primary Interrupt Request (IRQ) Mask 16-bit register.
•
Secondary Interrupt Request (IRQ) Mask 16-bit register.
The primary interrupt pin, p_inta_l, is asserted low whenever one or more Primary Interrupt Request bits are set
and their corresponding Primary IRQ Mask bits are 0. Signal p_inta_l remains asserted as long as this condition
exists. Signal p_inta_l is deasserted when either the Primary Interrupt Request bit is cleared or the Primary IRQ
Mask bit is set. The secondary interrupt pin, s_inta_l, is asserted low when one or more Secondary Interrupt
Request bits are set and their corresponding Secondary IRQ Mask bits are 0 (zero), and remains asserted as long as
this condition exists. The signal s_inta_l is deasserted when either the Secondary Interrupt Request bit is cleared or
the Secondary IRQ Mask bit is set.
Each register can be accessed at two addresses. One location is used to set bits and the other location is used to clear
them. To modify a request bit, a 1 is written to the bit in either the
write-1-to-set interrupt or write-1-to-clear interrupt register address. Interrupt status can be read from either
register.
11.4

Scratchpad Registers

Table 106, "Scratchpad 0 Through Scratchpad 7 Registers" on page 174
through scratchpad 7 registers.
The eight 32-bit scratchpad registers can be accessed in either memory or I/O space from either the primary or
secondary interface. They can pass control and status information between primary and secondary bus devices or
they can be generic R/W registers.
Writing or reading a scratchpad register does not cause an interrupt to be asserted. Doorbell interrupts can be used
for this purpose.They are read/write scratchpad registers.
21555 Non-Transparent PCI-to-PCI Bridge User Manual
Interrupt and Scratchpad Registers
lists the bit descriptions of the scratchpad 0
103