Pxe Boot; Checkpoints; Checkpoint Ranges - QUANTA STRATOS S200 Series S200-X12TS Technical Manual

BIOS

PXE Boot

The BIOS supports the EFI PXE implementation. To utilize this,
the user must load EFI Simple Network Protocol driver and the
UNDI driver specific for the network interface card being used.
The UNDI driver should be included with the network interface
card. The Simple Network Protocol driver can be obtained from
http://developer.intel.com/technology/framework.
The BIOS supports legacy PXE option ROMs in legacy mode
and includes the necessary PXE ROMs in the BIOS image for
the onboard controllers. The legacy PXE ROM is required to
boot a non-EFI operating system over the network.

Checkpoints

A checkpoint is either a byte or word value output to Debug
port. The BIOS outputs checkpoints throughout bootblock and
Power-On Self Test (POST) to indicate the task the system is
currently executing. Checkpoints are very useful in aiding soft-
ware developers or technicians in debugging problems that
occur during the pre-boot process.

Checkpoint Ranges

Checkpoint Ranges
S C
TATUS ODE
R
ANGE
0x01 – 0x0B SEC execution
0x0C – 0x0F SEC errors
0x10 – 0x2F PEI execution up to and including memory detection
0x30 – 0x4F PEI execution after memory detection
0x50 – 0x5F PEI errors
0x60 – 0x8F DXE execution up to BDS
0x90 – 0xCF BDS execution
0xD0 – 0xDF DXE errors
0xE0 – 0xE8 S3 Resume (PEI)
0xE9 – 0xEF S3 Resume errors (PEI)
0xF0 – 0xF8 Recovery (PEI)
0xF9 – 0xFF Recovery errors (PEI)
3-48
PXE B
OOT
D
ESCRIPTION