FPGA
S Leve
IF AGC
RX ATT
IF Signal
NB
IF AGC
RF Gain
EM Mode
Fig. 7.6.4 Overview of Configuration of Reception/Demodulation Processing Line
RF GAIN
IF AGC
RX ATT
IF Signal
EM Mode
Fig. 7.6.5 Overview of Received DSC/NBDP Signal Processing within DSP
CONFIDENTIAL (internal use only)
This confidential document is used only by FURUNO authorized persons.
It is strictly prohibited to reproduce the document in whole or in part without prior written permission of FURUNO.
IF
Demodulation
S Level
BPF
SSB/AM
Detect
FPGA
FSK
IF
Demodulation
IF AGC
BPF
NBDP/DSC
7-58
SQ
Gain
NR
AGC
NF
DSP
S Level
Detect
Base Band Signal
Digital Signal
Symbol
Demod
7.6 T-CPU
DSP
Voice SIgnal
LPF
Signal Level