Commodore 128 Programmer's Reference Manual page 725

R
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APPENDIXES 715
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I!
RM$canmand equ RAM$dsk$base+l ;r/w
; bit 7 execute per current config. if set
; 6 reserved
5 enable auto reload if set (restores all register to
value before canmand was done, else point to
next byte to read/write.)
4 disable FFOO decode if set (do operation after command writen)
3,2 reserved
1,0 00 = transfer C128 —> Ram Disk
01 = Transfer C128 <— Ram Disk
10 = swap C128 <-> Ram Disk
11 = Verify C128 = Ram Disk
equ RAM$dsk$base+2 ;r/w
;
;
RM$128$low
bits 0 to 7 of C128 address
RM$128$mid equ RAM$dsk$base+3 ;r/w
bits 8 to 15 of the C128 address
RM$ext$low equ RAM$dsk$base+4 ;r/w
bits 0 to 7 of Ram Disk address
RM$ext$mid equ RAM$dsk$base+5 ;r/w
bits 8 to 15 of Ram Disk address
RM$ext$hi equ RAM$dsk$base+6 ;r/w
bit 16 of Ram Disk address if 128K version
bits 16 to 18 of Ram Disk address if 512K version
RM$count$low equ RAM$dsk$base+7 ;r/w
low byte transfer count (bits 0-7)
RM$count$hi equ RAM$dsk$base+8 ;r/w
hi byte transfer count (bits 8-15)
RM$intr$mask equ RAM$dsk$base+9 ;r/w
bit 7 l=enable chip interrupts
6 l=enable end of block interrupts
5 l=enable verify error interrupts
RM$control equ RAM$dsk$base+10 ;r/w
bit 7,6 00 Increment both addresses
01 Fix expansion address
10 Fix C128 address
11 Fix both addresses
(default)
=> CIA equates
Data$a equ OOh
Data$b equ Olh
Data$dir$a equ 02h
Data$dir$b equ 03h
timer$a$low equ 04h
timer$a$high equ 05h
timer$b$lcw equ 06h
timer$b$high equ 07h
tod$sec$60 equ 08h
tod$sec equ 09h
tod$min equ Oah
tod$hrs equ Obh
sync$data equ Och
int$ctrl equ Odh
cia$ctrl$a equ Oeh
cia$ctrl$b equ Ofh
CIA$hours equ CIAl+tod$hrs
key$row
equ
CIA1+Data$a
; output