Commodore 128 Programmer's Reference Manual page 304

294 COMMODORE 128
REG
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
7
HT7
HD7
HP7
VW3
VT7
—
VD7
VP7
—
—
—
DS15
DS7
CP15
CP7
LPV7
LPH7
UA15
UA7
AA15
AA7
CTH3
—
COPY
TEXT
FG3
AI7
CB15
—
WC7
DA7
BA15
BA7
DEB7
DEE7
—
6
HT6
HD6
HP6
VW2
VT6
—
VD6
VP6
—
CM1
—
DS14
DS6
CP14
CP6
LPV6
LPH6
UA14
UA6
AA14
AA6
CTH2
—
RVS <
ATR
FG2
AI6
CB14
—
WC6
DA6
BA14
BA6
DEB6
DEE6
—
5
HT5
HD5
HP5
VW1
VT5
—
VD5
VP5
CMO
—
DS13
DS5
CP13
CP5
LPV5
LPH5
UA13
UA5
AA13
AA5
CTH1
—
:brate
SEMI
FG1
AI5
CB13
—
WC5
DA5
BA13
BA5
DEB5
DEE5
—
HSyNCVSyNC
4
HT4
HD4
HP4
VWO
VT4
VA4
VD4
VP4
CTV4
CS4
CE4
DS12
DS4
CP12
CP4
LPV4
LPH4
UA12
UA4
AA12
AA4
CTHO
CDV4
VSS4
DBL
FGO
AI4
RAM
UL4
WC4
DA4
BA12
BA4
DEB4
DEE4
—
—
BITS
3
HT3
HD3
HP3
HW3
VT3
VA3
VD3
VP3
CTV3
CS3
CE3
DS11
DS3
CPU
CP3
LPV3
LPH3
UAH
UA3
AA11
AA3
CDH3
CDV3
VSS3
HSS3
BG3
AI3
UL3
WC3
DA3
BAH
BA3
DEB3
DEE3
DRR3
—
2
HT2
HD2
HP2
HW2
VT2
VA2
VD2
VP2
CTV2
CS2
CE2
DS10
DS2
CP10
CP2
LPV2
LPH2
UA10
UA2
AA10
AA2
CDH2
CDV2
VSS2
HSS2
BG2
AI2
UL2
WC2
DA2
BA10
BA2
DEB2
DEE2
DRR2
—
l
HT1
HD1
HP1
HW1
VT1
VA1
VD1
VP1
IM1
0
HTO
HDO
HPO
HWO
VTO
VAO
VDO
VPO
IMO
CTV1 CTVO
CS1
CE1
DS9
DS1
CP9
CP1
LPV1
LPH1
UA9
UA1
AA9
AA1
CSO
CEO
DS8
DSO
CP8
CPO
LPVO
LPHO
UA8
UAO
AA8
AAO
CDH1CDH0
CDV1CDVO
VSS1
HSS1
BG1
All
UL1
WC1
DAI
BA9
BA1
DEB1
DEE1
VSSO
HSSO
BGO
AIO
ULO
WCO
DAO
BA8
BAO
DEBO
DEEO
DRR1DRR0
— —
Horizontal Total
Horizontal Displayed
Horizontal Sync Position
Vert/Horiz Sync Width
Vertical Total
Vertical Total Adjust
Vertical Displayed
Vertical Sync Position
Interlace Mode
Character Total Vertical
Cursor Mode, Start Scan
Cursor End Scan Line
Display Start Address hi
Display Start Address lo
Cursor Position hi
Cursor Position lo
Light Pen Vertical
Light Pen Horizontal
Update Address hi
Update Address lo
Attribute Start Adr hi
Attribute Start Adr lo
Character Tot(h), Dsp(V)
Character Dsp(v)
Vertical smooth scroll
Horizontal smooth scroll
Foregnd/Bgnd Color
Address Increment / Row
Character Base Address
Underline scan line
Word Count
Data
Block Start Address hi
Block Start Address lo
Display Enable Begin
Display Enable End
DRAM Refresh rate
Horiz, Vert Sync Polarity
U
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i -
J
u
1
Lj
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Lj
L
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i
i
L
L
L
Figure 10-1. 8563 VDC Register Map
The numbers in the left column are the register numbers. When programming the
8563, the registers are referenced by number only, since they have no actual address in
the C128 memory map. Within the register map, columns 7 through 0 apply to the bits
within the registers. To the right are the register names, by function. Many of the
registers control more than one operation of the chip, so the names only reference the
primary purpose of the register. These registers are discussed individually at the end of
this chapter. Certain key registers are discussed in the next section. For an explanation
of each register, see the register-by-register description in the back of this chapter.
u