Commodore 128 Programmer's Reference Manual page 218

208 COMMODORE 128
THE RELATIONSHIP BETWEEN
VIDEO BANKS, RAM BANKS w
AND MEMORY CONFIGURATIONS L
Many of you are familiar with how the Commodore 64 manages memory. This section jj
explains how the Commodore 128 manages video memory, and how the video banks
relate to the currently selected memory configuration.
MANAGING BANKED MEMORY ^
Banking is a process in which a section of memory is addressed by the microprocessor. f j
The memory is said to be banked in when it is available to the microprocessor in the [J
current memory configuration.
The Commodore 128 is programmable in its memory configuration. BASIC and
the Machine Language Monitor give you 16 pre-programmed default configurations of j
memory (referred to in BASIC as banks). For the purposes of this discussion, BASIC ^
banks are referred to simply as default memory configurations which are combinations
of ROM and RAM in various ranges of memory. The current configuration, whether in I
BASIC or machine language, is determined by the value in the configuration register of LJ
the C128 Memory Management Unit (MMU) chip.
The sixteen different configurations in BASIC and the Machine Language Monitor j j
require different values to be placed in the configuration register so that particular [J
combinations of ROM and RAM can be banked into memory simultaneously. For
example, the character ROM is only available in memory configuration 14 (Bank 14 in .--,
BASIC; the fifth digit hexadecimal prefix "E" in the Machine Language Monitor),
since this configuration tells the C128 MMU to swap out the I/O registers between
$D000 and $DFFF, and replace them with the character ROM. To swap the I/O
capabilities back in, change to any configuration number that contains I/O. Figure 8-1 j I
lists the sixteen default memory configurations available in BASIC and the Machine LJ
Language Monitor. Information on programming the MMU is contained in Chapter 13,
The Commodore 128 Operating System. j j
THE TWO 64K RAM BANKS
The Commodore 128 memory is composed of two RAM banks (labeled 0 and 1), each j /
having 64K of RAM, giving a total of 128K. The 8502 microprocessor address bus is 16 jj
bits wide, allowing it to address 65536 (64K) memory locations at a time. Figure 8-2
illustrates the two separate 64K RAM banks.
Although only 64K can be accessed at one time, the MMU has provisions for I j
sharing up to 16K of common RAM between the two RAM banks. Common RAM is ^
discussed in Chapter 13.
The 8502 microprc
bank. The 8502 RAM bank is selected by the configuration register (bits 6 and 7) and
The 8502 microprocessor and the VIC chip can each access a different 64K RAM \ I
u