Commodore 128 Programmer's Reference Manual page 140

Hide thumbs Also See for 128:
Table of Contents

Advertisement

130
COMMODORE 128
The BASIC example above places a 0 in locations (addresses) 1024 through 1034.
Line 10 sets up a loop from memory locations 1024 to 1034. Line 20 POKEs the value 0
into the location specified by I. The first time through the loop, I equals 1024. The
I I
second time through the loop, I equals 1025 and so on. Line 30 increments the index
U
variable I by 1 each time it is encountered.
The previous machine-language example accomplishes the same task as the BA-
| I
SIC example. LDA #$00 loads a 0 into the accumulator. TAX transfers the contents of
[J
the accumulator into the X-index register. The following machine-language instructions
form a loop:
START
STA $0400,X
|J
INX
CPX#$0B
BNE START
\
Here's what happens within the loop. STA $0400,X stores a 0 in location $0400
(hex) the first time through the loop. Location $0400 is location 1024 decimal. INX
. ,
increments the X register by 1, each cycle through the loop. CPX #$0B compares the
I
contents of the X register with the constant 11 ($0B). If the contents of the X register do
not equal 11, the program branches back to START STA $0400,X and the loop is
repeated.
I j
The second time through the loop, 0 is stored in address $0401 (1025 decimal) and
U
the X register is incremented again. The program continues to branch until the contents
of the X register equal 11.
i
i
The effective address for the first cycle through the loop is $0400 which is 1024
(J
decimal. For the second cycle through the loop the effective address is $0400 + 1, and
so on. Now you can see how the index registers modify the address within machine-
language instruction.
THE STATUS REGISTER
The microprocessor's status register indicates the status of certain conditions within the
I I
8502. The status register is controlled by seven programming states of the microproces-
U
sor, and indicates the conditions with flags. The status register is one byte, so each flag
is represented by a single bit. Bit 5 is not implemented.
. i
Branching instructions check (4 of the 7 bits in) the status register to determine
whether a condition has occurred. The conditions for branching pertain to the value of
the bits in the status register. If a condition is true, meaning the FLAG bit corresponding
to one of the four conditions is high (equal to a 1), the computer branches. If the
I j
condition you are testing is not true, the computer does not branch and the program
resumes with the instruction immediately following the branch.
Figure 5-2 shows the layout of the 8502 status register and lists the conditions
the status register flags.
u

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents