Commodore 128 Programmer's Reference Manual page 626

616 COMMODORE 128
R/W—READ/WRITE INPUT
The RAV signal is normally supplied by the microprocessor and controls the direction of
data transfers of the 6526. A high on R/W indicates a read (data transfer out of the
6526), while a low indicates a write (data transfer into the 6526).
RS3-RS0—ADDRESS INPUTS
The address inputs select the internal registers as described by the Register Map.
DB7-DB0—DATA BUS INPUTS/OUTPUTS
The eight data bus pins transfer information between the 6526 and the system data bus.
These pins are high impedance inputs unless CS is low and R/W and <|>2 are high to read
the device. During this read, the data bus output buffers are enabled, driving the data
from the selected register onto the system data bus.
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IRQ—INTERRUPT REQUEST OUTPUT
IRQ is an open drain output normally connected to the processor interrupt input. An
external pullup resistor holds the signal high, allowing multiple IRQ outputs to be
connected together. The IRQ output is normally off (high impedance) and is activated
low as indicated in the functional description.
RES—RESET INPUT
A low on the RES pin resets all internal registers. The port pins are set as inputs and
port registers to zero (although a read of the ports will return all highs because of
passive pullups). The timer control registers are set to 0 and the timer latches to all ones.
All other registers are reset to 0.
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6526 TIMING CHARACTERISTICS
SYMBOL CHARACTERISTIC
Tcyc
Tr,Tf
Tchw
Tclw
Tpd
Twcs
Tads
Tadh
Trws
Trwh
Tds
Tdh
$2 Clock
Cycle Time
Rise and Fall Time
Clock Pulse Width (High)
Clock Pulse Width (Low)
Write Cycle
Output Delay From $2
CS low while <t>2 high
Address Setup Time
Address Hold Time
RAV Setup Time
RAV Hold Time
Data Bus Setup Time
Data Bus Hold Time
1MHz 2MHz
MIN MAX MIN MAX
UNIT
1000 20,000 500 20,000 ns
— 25 — 25 ns
420 10,000 200 10,000 ns
420 10,000 200 10,000 ns
—
420
0
10
0
0
150
0
1000 —
— 200
— 0
— 5
— 0
— 0
— 75
— 0
500 ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
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