Commodore 128 Programmer's Reference Manual page 579

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C128 HARDWARE SPECIFICATIONS
569
THE 8502
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MICROPROCESSOR
GENERAL DESCRIPTION
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The 8502 is an HMOSII Technology microprocessor, similar to the 6510/6502. It is the
normal operating processor used in C64 and C128 modes. Software-compatible with
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the 6510, hence the 6502, the 8502 also features a zero page port used in memory
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management and cassette implementation.
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The 8502 is also specified for operation at 2 MHz. The 2 MHz operation is made
possible by removing the VIC from the system as a display chip. (The VIC chip is never
completely removed from the C128 system, as it continues to function as clock
generator and refresh controller.) What this refers to is that the VIC is removed as a display
chip and co-processor; thus the full clock cycle can be devoted to processor functioning
instead of sharing the cycle with the VIC.
The task of the video display processor is taken over by the 8563, which can
function without the need for bus sharing. Since the I/O devices, SID, etc., are rated at
1 MHz only, stretching of the 2 MHz clock is used to allow these parts to be accessed
directly by the 2 MHz processor and still keep throughput to a maximum.
The I/O devices are not affected by the 2 MHz operation, as they are still driven
by a 1 MHz source (as such, all timer operations remain unchanged), and clock
stretching is used only to synchronize the 2 MHz machine cycle to the 1 MHz $0 high
time. The clock sources and clock-stretching capabilities are generated by the VIC chip.
ELECTRICAL SPECIFICATION
This section describes some of the electrical constraints and specifications of the system.
MAXIMUM RATINGS
Table 16-3 gives the absolute maximum ratings of the 8502 microprocessor.
RATING
Supply Voltage
Input Voltage
Storage Temperature
Operating Temperature
SYMBOL
Vcc
vin
Tstg
Ta
VALUE
-0.5 to
-0.5 to
-55 to
Oto
+ 7.0
+ 7.0
+ 150
+ 70
UNIT
Vdc
Vdc
°C
°C
Table 16-3. 8502 Absolute Maximum Ratings
ELECTRICAL CHARACTERISTICS
Table 16-4 gives the 8502's basic electrical specifications for minimum, typical and
worst-case operation, valid over the range of operation T.

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