Commodore 128 Programmer's Reference Manual page 164

154 COMMODORE 128
7 0
NV BDIZC
BCC
BCS
BEQ
BMI
BNE
BPL
BVC
BVS
Here's what the conditional branch instructions mean. The phrases in parentheses
are the literal translations of the op-code mnemonics. The remainder explains the
meaning behind the op-codes.
u
U
Contents of Memory Address = 01111010 \ (
Contents of Accumulator = 10000100 -> 0 1 1 jj
Result of BIT instruction = 00001000 Status Register . .
il
This time the bit patterns result in 0. Therefore, the zero flag in the status register ^
is set to 1. Bits 7 and 6 are also placed into their respective negative and overflow status
register bit positions from their positions in the memory location. ] '
Now you know how each of the arithmetic and logical instructions operate. The [_,
next section discusses branching instructions. Branching instructions are designed so
you can conditionally execute a certain set of instructions, depending on the result of a r ,
condition. Many times the conditions are contingent on the results of an arithmetic or \
logical operation, which affects the flags in the status register. The branching instruc
tions then act according to the flags in the status register.
BRANCHING INSTRUCTIONS ^
The 8502 microprocessor has many conditional branching instructions. By definition, a i j
branch temporarily redirects the otherwise sequential execution of program instructions. IJ
It transfers control to a location of a machine-language instruction other than the one
immediately following the branch instruction in memory.
The conditional branch instructions cause the microprocessor to examine a particu- \ J
lar flag in the status register. The processor, depending on the value of the tested flag, lJ
either takes the branch and transfers control of the program to another location or skips
the branch and resumes with the instruction immediately following the branch. j i
Think of a conditional branch as a test. For example, if the condition passes the [J
test, the program branches or shifts control to an instruction that is not the next
sequential instruction in the computer's memory. If it fails the test, the branch is skipped
and program control resumes with the instruction immediately following the branch j
instruction in memory. Remember that program control can also be shifted to an L>
instruction that is out of sequential order if it fails a test. This means you can transfer
control of the execution of your program depending on the conditions you create. You \
may set a condition that branches if the value of a certain flag (operand) is zero. j^
In another instance, you may set a condition to branch if a specific flag is set
tol. -
The conditional branch instructions available in the 8502 microprocessor are: j
U