Commodore 128 Programmer's Reference Manual page 317

PROGRAMMING THE 80-COLUMN (8563) CHIP 307
■ Instruction 3 (BPL $1812) is a conditional instruction that branches depending
upon the value of the negative flag bit in the 8502 status register. In this
P program, the BPL (Branch on Result Plus) instruction branches back to
I location $1812 and executes the BIT instruction while the negative flag bit is
equal to 0. The BIT instruction is again performed, and the value in bit 7 is
<—> again transferred to the negative flag bit in the 8502 status register. Then the
I ! BPL instruction is encountered in the loop for a second time. If the value of the
status bit is still equal to 0, the branch is performed again. The loop continues
^ until the negative status bit is equal to one. Only when the status bit is equal to
| 1 does the loop fall through to the instruction immediately following the branch
1 instruction.
Prior to the loop falling through to the instruction after the branch, the
pi Update Ready status bit becomes a 1, it is transferred to the negative flag bit in
! j the 8502 status register, the branch is skipped, and the data can be read (loaded
with the fourth instruction of the subroutine ($1817) into $D601. Only after the
^ status bit becomes high (1) is the data in $D601 valid. This is the point where the
j | data is communicated from the 8563 chip to the Commodore 128 memory. Now
' • you can read and act upon the contents of the address within register $14 of the
8563 chip.
n ■ The fourth instruction loads the value stored in the 8563 data register ($D601)
I I into the accumulator.
■ The third instruction of the main program stores the value of the data register
<—> into location $FB for future use. Subsequent read operations from ($D601)
] | destroy the original value, so it is always a good practice to store the contents of
$D601 into a variable or available RAM location.
^ ■ The next instruction, INX, increments the contents of the X register, which
I j selects the next register number, $15, so the low byte of the 16-bit address
' ^ of the start of attribute storage can be read.
■ The rest of the program performs the same sequence of steps above for the
p low byte of the start of attribute storage except for the RTS instruction. The
j i RTS instruction returns program control back to a main program.
^ The BASIC portion of the program prints the high and low bytes of the 16-bit
j address that defines the start of attribute storage.
To find the actual address in 8563 RAM of the start of attribute storage, put the
high byte and low byte together, and the four-digit hexadecimal number defines the start
r? of attribute storage. Within the monitor, issue this memory command:
1 MFB
« The contents of $FB and $FC (high/low bytes) mark the start of attribute storage.