Commodore 128 Programmer's Reference Manual page 627

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CI28 HARDWARE SPECIFICATIONS 617
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6526 TIMING CHARACTERISTICS
SYMBOL
Tps
Twcs(2)
Tads
Taoh
Trws
Trwh
Tacc
Ico(3)
TDr
CHARACTERISTIC
Read Cycle
Port Setup Time
CS low while 4>2 high
Address Setup Time
Address Hold Time
R/W Setup Time
RAY Hold Time
Data Access from RS3-RS0
Data Access from CS
Data Release Time
(continued)
1MHz
MIN MAX
300 —
420 —
0 —
10 —
0 —
0 —
— 550
— 320
50 —
2MHz
MIN MAX
150 —
20 —
0 —
5 —
0 —
0 —
— 275
— 150
25 —
UNIT
us
ns
ns
ns
ns
ns
ns
ns
ns
! i
1.
2.
3.
All timings are referenced from V^ max and Vffl min on inputs and VOl max and
VDH min on outputs.
Twcs is measured from the later of <|>2 high or CS low. CS must be low at least
until the end of <|>2 high.
Tco is measured from the later of <|>2 high or CS low. Valid data is available only
after the later of TACC or Tco.
REGISTER MAP
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RS3 RS2 RSI RS0 REG NAME
DESCRIPTION
PRA
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
PRB
DDRA
DDRB
TALO
TAHI
TBLO
TBHI
TOD 10THS
TOD SEC
TOD MIN
TODHR
SDR
ICR
CRA
CRB
PERIPHERAL DATA REG A
PERIPHERAL DATA REG B
DATA DIRECTION REG A
DATA DIRECTION REG B
TIMER A LOW REGISTER
TIMER A HIGH REGISTER
TIMER B LOW REGISTER
TIMER B HIGH REGISTER
10THS OF SECONDS REGISTER
SECONDS REGISTER
MINUTES REGISTER
HOURS—AM/PM REGISTER
SERIAL DATA REGISTER
INTERRUPTCONTROLREGISTER
CONTROL REG A
CONTROL REG B