Address 0X0007 Digital Power Management Register (Default: 0X0000); Address 0X0009 Spdif Transmitter Control Register (Default: 0X0000) - Analog Devices ADAV4601 System Design Document

Bit No. Bit Name
Bit[2] HP1DAC left
Bit[1] HP1 AMP right
Bit[0] HP1 AMP left

Address 0x0007 Digital Power Management Register (Default: 0x0000)

Table 43.
Bit No. Bit Name
Bits[15:8] Reserved
Bit[7] PWM
Bit[6] S/PDIF TX
Bit[5] Reserved
Bit[4] SRC2
Bit[3] SRC1
Bit[2] Reserved
Bit[1] ADC/DAC
engine
Bit[0] Audio
processor

Address 0x0009 SPDIF Transmitter Control Register (Default: 0x0000)

Table 44.
Bit No. Bit Name
Bits[15:8] Reserved
Bits[14:12] SPDIF output
select
ADAV4601 System Design Document
Rev.1 August 2009
Description
1b = block powered up
0b = block powered down
Powers on the HP1 DAC left channel.
1b = block powered up
0b = block powered down
Powers on the HP1 AMP right channel.
1b = block powered up
0b = block powered down
Powers on the HP1 AMP left channel.
1b = block powered up
0b = block powered down
Description
Always write as 0 if writing to this register.
Powers on the PWM channels.
1b = block powered up
0b = block powered down
Powers on the S/PDIF transmitter.
1b = block powered up
0b = block powered down
Always write as 0 if writing to this register.
Powers on SRC2.
1b = block powered up
0b = block powered down
Powers on SRC1.
1b = block powered up
0b = block powered down
Always write as 0 if writing to this register.
Powers on the ADC/DAC engine.
1b = block powered up
0b = block powered down
Powers on the audio processor core.
1b = block powered up
0b = block powered down
Description
Always write as 0 if writing to this register.
Selects the source for the SPDIF output.
000b = output internally generated SPDIF
001b = output SPDIF_IN2
Analog Devices
Default
0
0
0
Default
00000000
0
0
0
0
0
0
0
0
Default
00000000
000
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