Analog Devices ADAV4601 System Design Document page 18

Note: This register write powers up all parts of the ADAV4601 that were not previously powered up. In power critical
applications this may not be desired. In this case the ADAV4601 can have the various digital blocks powered up
individually using the digital power management register.
Note: This register was written to previously to set the PLL frequency, for this example the PLL frequency is
assumed to be 512*Fs. This must be kept consistent throughout the power up sequence.
This sequence of writes must be written in succession so as to decrease the gain of the headphone amplifiers from
0dB to-15dB in 1.5dB steps. The headphone amplifier gain by default is set to 0dB which means that the outputs
reference voltage is set to 1.5V, by decreasing this to -15dB means that the reference voltage is reduced to 0.267V, at
which there is a much lower chance of hearing any spurious responses caused by any possible DC level changes
while enabling the iDAC. It is at this point that the iDAC is connected to the current to voltage converter. The profile
of the reference voltage is shown in Figure 10.
Once the iDAC and the current to voltage converter have been connected there is no longer any potential issue
about hearing a click at the output of the headphone as there are no longer any DC level changes and therefore the
headphone amplifier gain can be increased again from 0.267V up to 1.5V. These register writes increase the gain of
the headphone amplifiers in 1.5dB steps from -15dB to 0dB. The profile of the reference voltage is shown in Figure
10.
1.5V (0dB) 1.5V (0dB)
0.267V (-15dB) 0.267V (-15dB)
As the iDAC and the current to voltage converter are now connected, there is no longer any need for the iDAC
buffer. This register write therefore powers it down.
ADAV4601 System Design Document
Rev.1 August 2009
34 000B 2121
34 000B 2222
34 000B 2323
34 000B 2424
34 000B 2525
34 000B 2626
34 000B 2727
34 000B 2828
34 000B 2929
34 000B 2A2A
34 008D 07A0
34 000B 2929
34 000B 2828
34 000B 2727
34 000B 2626
34 000B 2525
34 000B 2424
34 000B 2323
34 000B 2222
34 000B 2121
34 000B 2020
Enable iDAC Enable iDAC
Vref Charger Circuit Vref Charger Circuit
Decrease HP Decrease HP
Amp Gain Amp Gain
Figure 10: Vref Profile at headphone output
34 008D 0720
Analog Devices
Increase HP Increase HP
Amp Gain Amp Gain
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