Address 0x0004 Serial Port Control 1 Register (Default: 0x0000)
Table 40.
Bit No.
Bit Name
Bits[15:13]
Reserved
Bits[12:11]
SRC2 serial
mode
Bits[10:9]
SRC2 word
width
Bits[8:7]
SRC1 serial
mode
Bits[6:5]
SRC1 word
width
Bit[4]
Sync master
slave
Bits[3:2]
Sync serial
mode
Bits[1:0]
Sync word
width
ADAV4601 System Design Document
Rev.1 August 2009
Description
Always write as 0 if writing to this register.
Use to select the format of the data for SRC2.
2
00b = I
S
01b = left-justified
10b = right-justified
11b = not applicable
Use to specify the word width of the data.
00b = 24 bits
01b = 20 bits
10b = 16 bits
11b = not applicable
Use to select the format of the data for SRC1.
2
00b = I
S
01b = left-justified
10b = right-justified
11b = not applicable
Use to specify the word width of the data.
00b = 24 bits
01b = 20 bits
10b = 16 bits
11b = not applicable
Used to set master or slave mode for the synchronous input. In slave mode,
LRCLK1 and BCLK1
are provided by another source. In master mode, the ADAV46xx provides
LRCLK1 and BCLK1.
0b = slave
1b = master
Used to select the format of the data for the inputs used by the synchronous
serial input block.
2
00b = I
S
01b = left-justified
10b = right-justified
11b = not applicable
Used to specify the word width of the data for the synchronous digital
inputs.
00b = 24 bits
01b = 20 bits
10b = 16 bits
11b = not applicable
Analog Devices
Default
000
00
00
00
00
0
00
00
Confidential Information
Page 88
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