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User Manuals: Analog Devices ADAV4601 Audio Processor
Manuals and User Guides for Analog Devices ADAV4601 Audio Processor. We have
1
Analog Devices ADAV4601 Audio Processor manual available for free PDF download: System Design Document
Analog Devices ADAV4601 System Design Document (112 pages)
Brand:
Analog Devices
| Category:
Motherboard
| Size: 4 MB
Table of Contents
Table of Contents
2
Introduction
5
Section 1 - Getting the Evaluation Board up and Running
6
General Board Overview
6
Evaluation Board Description
7
ADAV4601 Evaluation Board Quick Start
8
Providing a Clock Source for the ADAV4601
8
Clocking the ADAV4601 Using the Onboard Crystal (Y3)
9
Clocking the ADAV4601 Using the 96-Way Connector (MCLK)
10
Clocking the ADAV4601 Using the 96-Way Connector (BCLK1)
11
Evaluation Board I/O
12
Analog I/O
12
Headphone Output
12
Spdif I/O
12
SPDIF Receiver
12
SPDIF Transmitter
12
PWM Outputs
13
Link/Jumper Configurations
13
Testpoints
14
Section 2 - Powering up the ADAV4601
15
Write Sequence Explained
15
Power up Sequence
15
Power down Sequence
21
Section 3 - Programming the ADAV4601
23
Designing and Developing
23
Connecting the Hardware
24
Installing Sigmastudio
24
Installing Additional DLL Files
24
Evaluating the ADAV4601 Using Sigmastudio
26
Powering up the ADAV4601 Evaluation Board
27
Downloading and Compiling an Audio Flow
28
Creating a New Audio Flow
29
Using Sigmastudio to Control the Default Audio Flow
34
Adav4Xxx Self Boot
37
Boot Sequence
37
Enabling EEPROM Booting
37
EEPROM Data Structure
37
Boot Time
38
Section 4 - the Default Flow
40
Default Flow Structure
40
Main Channel
40
Headphone Channel
41
AUXOUT1 Channel
41
S/PDIF Channel
41
SDO0 Channel
41
Inputs
41
Scenarios
41
Changing the Volume
43
Example: Increase the Main Volume to +6Db over Default
43
Section 5 - Interfacing the ADAV4601 to a System
45
Using the Default Flow
45
Default Flow Example
45
Using a Custom Flow
45
Custom Flow Example
46
ROMS and Registers
47
Safe Loading to Parameter RAM and Target/Slew RAM
47
Using a Custom Flow with the Application Layer
48
Custom Flow with Application Layer Example
48
ROMS and Registers
48
ADAV4601 System Design Document Confidential Information
49
Read/Write Data Formats
49
Section 6 - the Application Layer Creation Software
50
The Application Layer
50
Application Layer Creation Software
50
Linking the Application Layer Software to Your Audio Flow
51
Application Layer Software GUI
52
User Manual
53
Menu Bar: File Menu
53
Compile and Download
54
Project Information
54
Import Sigmastudio
55
Application Layer Register Structure
55
Sigmastudio Cells and Cell Parameters
56
Path Information
57
Register Tools
57
Add Cell to a Register
57
Edit Register
59
Delete Register
59
Registers List and Cells in Current Register
59
Editing a Cell Previously Defined
60
Register Information
60
The Cell Wizards
61
Volume / Gain Wizard
61
Filters Wizard
62
Filter Type Selection
63
Multiplexers Wizard
63
Delay Wizard
63
Loudness Wizard
64
Clipper Wizard
64
Mute Wizard
64
Enable Wizard
65
Imported Registers
65
Step-By-Step Sample Project Creation
67
Appendix A - Detailed Register Descriptions
68
Default Audio Flow Registers
68
Address 0X0100 Mux Select 1 Register (Default: 0X0000)
68
Address 0X0101 Mux Select 2 Register (Default: 0X0000)
69
Address 0X0102 Main and Headphone 1/AUXOUT4 Input Trim Register (Default: 0X0E0E)
70
Address 0X0103 SDO0/AUXOUT3 and SPDIF Input Trim Register (Default: 0X0E0E)
71
Address 0X0104 AUXOUT1 Input Trim Register (Default: 0X0E0E)
71
Address 0X0105 Main Delay Register (Default: 0X0000)
72
Address 0X0106 Automatic Volume Control (Default: 0X350C)
72
Address 0X0107 Main Sever Band EQ Control Register (Default: 0X0018)
73
Address 0X0108 Main Channel Loudness Register (Default: 0X0000)
74
Address 0X0109 Crossover Register (Default: 0X0505)
74
Address 0X010A Crossover Trim Register (Default: 0X0E0E)
75
Address 0X010B ADI Bass Control Register (Default: 0X0062)
76
Address 0X010C and Address 0X010D Tweeter Left Balance Control Registers (Default: 0X0080, 0X0000)
76
Address 0X010E and Address 0X010F Tweeter Right Balance Control Registers (Default: 0X0080, 0X0000)
77
Address 0X0110 and Address 0X0111 Woofer Left Balance Control Registers (Default: 0X0080, 0X0000)
77
Address 0X0112 and Address 0X0113 Woofer Right Balance Control Registers (Default: 0X0080, 0X0000)
77
Address 0X0114 and Address 0X0115 Main Volume Control Registers (Default: 0X0080, 0X0000)
78
Address 0X0116 Tweeter Peak Limiter Control Register (Default: 0X0F00)
78
Address 0X0117 Woofer Peak Limiter Control Register (Default: 0X0F00)
79
Address 0X0118 Headphone 1/AUXOUT4 Seven Band EQ Control Register (Default: 0X0018)
81
Address 0X011A and Address 0X011B Headphone 1/AUXOUT4 Left Balance Control Registers (Default: 0X0080, 0X0000)
81
Address 0X011C and Address 0X011D Headphone 1/AUXOUT4 Right Balance Control Registers (Default: 0X0080, 0X0000)
82
Address 0X011E and Address 0X011F Headphone 1/AUXOUT4 Volume Control Registers (Default: 0X0080, 0X0000)
82
ADAV4601 System Design Document Confidential Information
82
Address 0X0120 Headphone 1/AUXOUT4 Channel Loudness Register (Default: 0X0000)
82
Address 0X0121 Mute Control Register (Default: 0X0000)
83
Address 0X0122 Audio Flow Control Register (Default: 0X8001)
83
Address 0X0123 Main Beeper Control Register (Default: 0X0005)
85
Address 0X0124 Low-Pass Filter (Subchannel) Register (Default: 0X0003)
85
Address 0X0126 SRC Delay Register (Default: 0X0000)
86
Address 0X0127 SRC Control Register (Default: 0X0030)
86
Main Control Registers
87
Address 0X0000 Initialization Control Register (Default: 0X0080)
87
Address 0X0004 Serial Port Control 1 Register (Default: 0X0000)
88
Address 0X0005 Analog Power Management 1 Register (Default: 0X8000)
89
Address 0X0006 Analog Power Management 2 Register (Default: 0X0000)
89
Address 0X0007 Digital Power Management Register (Default: 0X0000)
90
Address 0X0009 SPDIF Transmitter Control Register (Default: 0X0000)
90
Address 0X000A Misc Control Register (Default: 0X8000)
91
Address 0X000B Headphone Control Register (Default: 0X0000)
93
Address 0X000C Serial Port Control 2 Register (Default: 0X8004)
93
Address 0X000D Reserved (Default: 0X0721)
94
Address 0X0018 Audio Mute Control 1 Register (Default: 0X7F00)
94
Address 0X0019 PWM Status Register (Default: 0X0000)
95
Address 0X001E Reserved (Default: 0X3205)
95
Address 0X001F PWM Control Register (Default: 0X1070)
95
Address 0X0080 Reserved (Default: 0X00Fe)
96
Address 0X0081 Reserved (Default: 0X8202)
96
Address 0X0085 Reserved (Default: 0X00Fe)
96
Address 0X0086 Reserved (Default: 0X8202)
96
Address 0X008A SRC Configuration 3 Register (Default: 0X0032)
96
Address 0X008C DAC Standby Register (Default: 0X0000)
96
Address 0X008D Reserved (Default: 0X0220)
97
Address 0X008E SPDIF Transmitter Control 2 Register (Default: 0X002D)
97
Address 0X008F Reserved (Default: 0X000A)
98
Address 0X0200 EEPROM Self Boot Control Register (Default: 0X0000)
98
Address 0X0316 EEPROM Device Address Register (Default: 0X0050)
98
Address 0X0317 EEPROM Data Address Register (Default: 0X0000)
98
Appendix B - Layout Recommendations
99
Decoupling
99
Crystal Oscillator Circuit
99
PWM Outputs
100
Ground Plane
100
Appendix C - ADAV4601 Bill of Materials
101
Appendix D - Schematics
107
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