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Table 13. Impedance Control Selection
CONTROLIMP1-0
00 (recommended)
01
10 (default)
11
Table 14. Drive Strength/Output Impedance Selection
DS2–0
Drive
1
Pins
Strength
000
Strength 0 (11.1%)
001
Strength 1 (23.8%)
010
Strength 2 (36.5%)
011
Strength 3 (49.2%)
100
Strength 4 (61.9%)
101 (default)
Strength 5 (74.6%)
110
Strength 6 (87.3%)
111
Strength 7 (100%)
1
CONTROLIMP1 = 0, A/D mode disabled.
2
CONTROLIMP1 = 1, A/D mode enabled.
Table 15. Pin Definitions—Power, Ground, and Reference
Signal
Type
V
P
DD
V
P
DD_A
V
P
DD_IO
V
P
DD_DRAM
V
I
REF
SCLK_V
I
REF
V
G
SS
NC
—
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
Ω
5 k
; pu = internal pull-up 5 k
Ω
pull-up 500
on DSP ID = 0; pd_m = internal pull-down 5 k
Ω
= internal pull-up 40 k
. For more pull-down and pull-up information, see
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω
imately 5 k
to V
, nc = not connected; na = not applicable (always used); V
DD_IO
Driver Mode
Normal
Reserved
A/D Mode
Reserved
Output
Impedance
26 Ω
32 Ω
40 Ω
50 Ω
62 Ω
70 Ω
96 Ω
120 Ω
Term
Description
na
V
DD
na
V
DD
na
V
DD
na
V
DD
na
Reference voltage defines the trip point for all input buffers, except SCLK, RST_IN,
POR_IN, IRQ3–0, FLAG3–0, DMAR3–0, ID2–0, CONTROLIMP1–0, LxDATO3–0P/N,
LxCLKOUTP/N, LxDATI3–0P/N, LxCLKINP/N, TCK, TDI, TMS, and TRST. V
connected to a power supply or set by a voltage divider circuit as shown in
For more information, see Filtering Reference Voltage and Clocks on Page 10.
na
System Clock Reference. Connect this pin to a reference voltage as shown in
For more information, see Filtering Reference Voltage and Clocks on Page 10.
na
Ground pins.
nc
No Connect. Do not connect these pins to anything (not to any supply, signal, or each
other). These pins are reserved and must be left unconnected.
Ω
; pd_0 = internal pull-down 5 k
Rev. C | Page 19 of 48 | December 2006
2
pins for internal logic.
pins for analog circuits. Pay critical attention to bypassing this supply.
pins for I/O buffers.
pins for internal DRAM.
Ω
on DSP ID = 0; pu_0 = internal pull-up 5 k
Ω
on DSP bus master; pu_m = internal pull-up 5 k
Electrical Characteristics on Page
= connect directly to V
DD_IO
ADSP-TS201S
can be
REF
Ω
on DSP ID = 0; pu_od_0 = internal
Ω
on DSP bus master; pu_ad
22.
Ω
to V
; epu = external pull-up approx-
SS
; V
= connect directly to V
DD_IO
SS
Figure
6.
Figure
7.
SS
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