Analog Devices TigerSHARC ADSP-TS201S Specifications page 17

Table 9. Pin Definitions—JTAG Port
Signal Type
EMU O/OD
TCK I
TDI I (pu_ad)
TDO O/T
TMS I (pu_ad)
TRST I/A (pu_ad)
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
Ω
5 k ; pu = internal pull-up 5 k
Ω
pull-up 500 on DSP ID = 0; pd_m = internal pull-down 5 k
Ω
= internal pull-up 40 k . For more pull-down and pull-up information, see
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω
imately 5 k to V , nc = not connected; na = not applicable (always used); V
DD_IO
1
See the reference on Page 11 to the JTAG emulation technical reference EE-68.
Table 10. Pin Definitions—Flags, Interrupts, and Timer
Signal Type
FLAG3–0 I/O/A
(pu)
IRQ3–0 I/A
(pu)
TMR0E O
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
Ω
5 k ; pu = internal pull-up 5 k
Ω
pull-up 500 on DSP ID = 0; pd_m = internal pull-down 5 k
Ω
= internal pull-up 40 k . For more pull-down and pull-up information, see
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω
imately 5 k to V , nc = not connected; na = not applicable (always used); V
DD_IO
Term Description
1
nc Emulation. Connected to the DSP's JTAG emulator target board connector only.
1
epd or epu Test Clock (JTAG). Provides an asynchronous clock for JTAG scan.
1
nc Test Data Input (JTAG). A serial data input of the scan path.
1
nc Test Data Output (JTAG). A serial data output of the scan path.
1
nc Test Mode Select (JTAG). Used to control the test state machine.
na Test Reset (JTAG). Resets the test state machine. TRST must be asserted or pulsed low
after power up for proper device operation. For more information, see
Booting on Page
Ω
; pd_0 = internal pull-down 5 k
Term Description
nc FLAG pins. Bidirectional input/output pins can be used as program conditions. Each pin
can be configured individually for input or for output. FLAG3–0 are inputs after power-up
and reset.
nc Interrupt Request. When asserted, the DSP generates an interrupt. Each of the IRQ3–0 pins
can be independently set for edge-triggered or level-sensitive operation. After reset, these
pins are disabled unless the IRQ3–0 strap option and interrupt vectors are initialized for
booting.
na Timer 0 expires. This output pulses whenever timer 0 expires. At reset, this is a strap pin.
For more information, see
Ω
; pd_0 = internal pull-down 5 k
Rev. C | Page 17 of 48 | December 2006
9.
Ω
on DSP ID = 0; pu_0 = internal pull-up 5 k
Ω
on DSP bus master; pu_m = internal pull-up 5 k
Electrical Characteristics on Page
= connect directly to V
DD_IO
Table 16 on Page
Ω
on DSP ID = 0; pu_0 = internal pull-up 5 k
Ω
on DSP bus master; pu_m = internal pull-up 5 k
Electrical Characteristics on Page
= connect directly to V
DD_IO
ADSP-TS201S
Ω
on DSP ID = 0; pu_od_0 = internal
Ω
on DSP bus master; pu_ad
22.
Ω
to V ; epu = external pull-up approx-
SS
; V = connect directly to V
DD_IO SS
20.
Ω
on DSP ID = 0; pu_od_0 = internal
Ω
on DSP bus master; pu_ad
22.
Ω
to V ; epu = external pull-up approx-
SS
; V = connect directly to V
DD_IO SS
Reset and
SS
SS